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Tue, 29 Jun 2021 18:09:11 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7D929C6067; Tue, 29 Jun 2021 18:09:11 +0000 (GMT) Received: from localhost (unknown [9.85.182.157]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Tue, 29 Jun 2021 18:09:11 +0000 (GMT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 3/4] rs6000: Add support for SSE4.1 "blend" intrinsics Date: Tue, 29 Jun 2021 13:08:58 -0500 Message-Id: <20210629180859.1235662-4-pc@us.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210629180859.1235662-1-pc@us.ibm.com> References: <20210629180859.1235662-1-pc@us.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: dTALwNXIuqwNUXsBOoSwsRkUXYn-ciPR X-Proofpoint-ORIG-GUID: dTALwNXIuqwNUXsBOoSwsRkUXYn-ciPR X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-29_10:2021-06-29, 2021-06-29 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=999 lowpriorityscore=0 adultscore=0 suspectscore=0 phishscore=0 mlxscore=0 spamscore=0 impostorscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2106290114 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Paul A. Clarke via Gcc-patches" From: "Paul A. Clarke" Reply-To: "Paul A. Clarke" Cc: segher@kernel.crashing.org Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" _mm_blend_epi16 and _mm_blendv_epi8 were added earlier. Add these four to complete the set. 2021-06-29 Paul A. Clarke gcc/ChangeLog: * config/rs6000/smmintrin.h (_mm_blend_pd, _mm_blendv_pd, _mm_blend_ps, _mm_blendv_ps): New. --- gcc/config/rs6000/smmintrin.h | 46 +++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/gcc/config/rs6000/smmintrin.h b/gcc/config/rs6000/smmintrin.h index 1b8cad135ed0..fa17a8b2f478 100644 --- a/gcc/config/rs6000/smmintrin.h +++ b/gcc/config/rs6000/smmintrin.h @@ -116,6 +116,52 @@ _mm_blendv_epi8 (__m128i __A, __m128i __B, __m128i __mask) return (__m128i) vec_sel ((__v16qu) __A, (__v16qu) __B, __lmask); } +extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_blend_pd (__m128d __A, __m128d __B, const int __imm8) +{ + const signed char __tmp = (__imm8 & 0b10) * 0b01111000 | + (__imm8 & 0b01) * 0b00001111; + __v16qi __charmask = vec_splats ((signed char) __tmp); + __charmask = vec_gb (__charmask); + __v8hu __shortmask = (__v8hu) vec_unpackh (__charmask); + #ifdef __BIG_ENDIAN__ + __shortmask = vec_reve (__shortmask); + #endif + return (__m128d) vec_sel ((__v2du) __A, (__v2du) __B, (__v2du) __shortmask); +} + +extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_blendv_pd (__m128d __A, __m128d __B, __m128d __mask) +{ + const __v2di __zero = {0}; + const vector __bool long long __boolmask = vec_cmplt ((__v2di) __mask, __zero); + return (__m128d) vec_sel ((__v2du) __A, (__v2du) __B, (__v2du) __boolmask); +} + +extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_blend_ps (__m128 __A, __m128 __B, const int __imm8) +{ + const signed char __mask = (__imm8 & 0b1000) * 0b00011000 | + (__imm8 & 0b0100) * 0b00001100 | + (__imm8 & 0b0010) * 0b00000110 | + (__imm8 & 0b0001) * 0b00000011; + __v16qi __charmask = vec_splats ( __mask); + __charmask = vec_gb (__charmask); + __v8hu __shortmask = (__v8hu) vec_unpackh (__charmask); + #ifdef __BIG_ENDIAN__ + __shortmask = vec_reve (__shortmask); + #endif + return (__m128) vec_sel ((__v8hu) __A, (__v8hu) __B, __shortmask); +} + +extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_blendv_ps (__m128 __A, __m128 __B, __m128 __mask) +{ + const __v4si __zero = {0}; + const vector __bool int __boolmask = vec_cmplt ((__v4si) __mask, __zero); + return (__m128) vec_sel ((__v4su) __A, (__v4su) __B, (__v4su) __boolmask); +} + extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_testz_si128 (__m128i __A, __m128i __B) {