diff mbox series

rs6000: Add 'd' for doubleword variant of vector insert

Message ID 20200923165926.210870-1-pc@us.ibm.com
State New
Headers show
Series rs6000: Add 'd' for doubleword variant of vector insert | expand

Commit Message

Paul A. Clarke Sept. 23, 2020, 4:59 p.m. UTC 
When the "Vector Insert" section was added to the documentation,
the doubleword ('d') variant was omitted.  Add it.

2020-09-23  Paul A. Clarke  <pc@us.ibm.com>

gcc/
	* doc/extend.texi: Add 'd' for doubleword variant of
	vector insert instruction.
---
 gcc/doc/extend.texi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Segher Boessenkool Sept. 24, 2020, 12:03 a.m. UTC | #1 
On Wed, Sep 23, 2020 at 11:59:26AM -0500, Paul A. Clarke wrote:
> When the "Vector Insert" section was added to the documentation,
> the doubleword ('d') variant was omitted.  Add it.
> 
> 2020-09-23  Paul A. Clarke  <pc@us.ibm.com>
> 
> gcc/
> 	* doc/extend.texi: Add 'd' for doubleword variant of
> 	vector insert instruction.

Pushed to trunk as trivial and obvious.  Thanks Paul!


Segher
diff mbox series

Patch

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 5571c4f2ff2..7f14a28aca0 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -20961,9 +20961,9 @@  given by the third argument, using natural element order in the second
 argument.  The rest of the second argument is unchanged.  If the byte
 index is greater than 14 for halfwords, greater than 12 for words, or
 greater than 8 for doublewords the result is undefined.   For little-endian,
-the generated code will be semantically equivalent to @code{vins[bhw]rx}
+the generated code will be semantically equivalent to @code{vins[bhwd]rx}
 instructions.  Similarly for big-endian it will be semantically equivalent
-to @code{vins[bhw]lx}.  Note that some fairly anomalous results can be
+to @code{vins[bhwd]lx}.  Note that some fairly anomalous results can be
 generated if the byte index is not aligned on an element boundary for the
 type of element being inserted.
 @findex vec_insertl
@@ -20996,8 +20996,8 @@  for halfwords, 12 for words, or 8 for doublewords, the intrinsic will be
 rejected. Note that the underlying hardware instruction uses the same register
 for the second argument and the result.
 For little-endian, the code generation will be semantically equivalent to
-@code{vins[bhw]lx}, while for big-endian it will be semantically equivalent to
-@code{vins[bhw]rx}.
+@code{vins[bhwd]lx}, while for big-endian it will be semantically equivalent to
+@code{vins[bhwd]rx}.
 Note that some fairly anomalous results can be generated if the byte index is
 not aligned on an element boundary for the sort of element being inserted.
 @findex vec_inserth