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Thu, 27 Aug 2020 13:21:46 +0000 Received: from b03ledav004.gho.boulder.ibm.com (b03ledav004.gho.boulder.ibm.com [9.17.130.235]) by b03cxnp08026.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 07RDLeFR62193996 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 27 Aug 2020 13:21:40 GMT Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 39B1D7805C; Thu, 27 Aug 2020 13:21:45 +0000 (GMT) Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 21A7678063; Thu, 27 Aug 2020 13:21:45 +0000 (GMT) Received: from localhost (unknown [9.40.194.84]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTP; Thu, 27 Aug 2020 13:21:44 +0000 (GMT) To: gcc-patches@gcc.gnu.org Subject: [PATCH] rs6000: Support ELFv2 sibcall for indirect calls [PR96787] Date: Thu, 27 Aug 2020 08:21:34 -0500 Message-Id: <20200827132134.32958-1-wschmidt@linux.ibm.com> X-Mailer: git-send-email 2.17.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-08-27_07:2020-08-27, 2020-08-27 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 malwarescore=0 mlxlogscore=999 phishscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 suspectscore=1 bulkscore=0 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2008270094 X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Bill Schmidt via Gcc-patches From: Bill Schmidt Reply-To: Bill Schmidt Cc: dje.gcc@gmail.com, segher@kernel.crashing.org Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Prior to P10, ELFv2 hasn't implemented nonlocal sibcalls. Now that we do, we need to be sure that r12 is set up prior to such a call. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for trunk? Thanks, Bill 2020-08-27 Bill Schmidt gcc/ PR target/96787 * config/rs6000/rs6000-logue.c (rs6000_sibcall_aix): Support indirect call for ELFv2. gcc/testsuite/ PR target/96787 * gcc.target/powerpc/pr96787-1.c: New. * gcc.target/powerpc/pr96787-2.c: New. --- gcc/config/rs6000/rs6000.c | 19 +++++++++- gcc/testsuite/gcc.target/powerpc/pr96787-1.c | 38 ++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr96787-2.c | 35 ++++++++++++++++++ 3 files changed, 91 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr96787-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr96787-2.c diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 1c1caa90ede..09545278dcf 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -24833,14 +24833,27 @@ rs6000_sibcall_aix (rtx value, rtx func_desc, rtx tlsarg, rtx cookie) { rtx call[2]; rtx insn; + rtx r12 = NULL_RTX; + rtx func_addr = func_desc; gcc_assert (INTVAL (cookie) == 0); if (global_tlsarg) tlsarg = global_tlsarg; + /* For ELFv2, r12 and CTR need to hold the function address + for an indirect call. */ + if (GET_CODE (func_desc) != SYMBOL_REF && DEFAULT_ABI == ABI_ELFv2) + { + r12 = gen_rtx_REG (Pmode, 12); + if (!rtx_equal_p (r12, func_desc)) + emit_move_insn (r12, func_desc); + func_addr = gen_rtx_REG (Pmode, CTR_REGNO); + emit_move_insn (func_addr, r12); + } + /* Create the call. */ - call[0] = gen_rtx_CALL (VOIDmode, gen_rtx_MEM (SImode, func_desc), tlsarg); + call[0] = gen_rtx_CALL (VOIDmode, gen_rtx_MEM (SImode, func_addr), tlsarg); if (value != NULL_RTX) call[0] = gen_rtx_SET (value, call[0]); @@ -24853,6 +24866,10 @@ rs6000_sibcall_aix (rtx value, rtx func_desc, rtx tlsarg, rtx cookie) if (!rs6000_pcrel_p (cfun)) use_reg (&CALL_INSN_FUNCTION_USAGE (insn), gen_rtx_REG (Pmode, TOC_REGNUM)); + + /* Note use of r12. */ + if (r12) + use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r12); } /* Expand code to perform a call under the SYSV4 ABI. */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr96787-1.c b/gcc/testsuite/gcc.target/powerpc/pr96787-1.c new file mode 100644 index 00000000000..3c58e63797f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr96787-1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_elfv2 } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ + +/* Verify that we generate an indirect sibcall for ELFv2 on P10 and + later, with r12 and CTR containing the function address. PR96787. */ + +extern int f (int); + +int main () +{ + if (f (3) != 6) + return 1; + return 0; +} + + +int g (int a) +{ + return a * 2; +} + + +int h (int a) +{ + return a + 2; +} + +int __attribute__((__noinline__)) f (int a) +{ + int (*x) (int) = a % 2 ? &g : &h; + (*x) (a); +} + +/* { dg-final { scan-assembler {\mmtctr 12\M} } } */ +/* { dg-final { scan-assembler {\mbctr\M} } } */ +/* { dg-final { scan-assembler-not {\mbctrl\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr96787-2.c b/gcc/testsuite/gcc.target/powerpc/pr96787-2.c new file mode 100644 index 00000000000..b10ab7a8ce8 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr96787-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-require-effective-target power10_hw } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ + +/* Verify that we generate an indirect sibcall for ELFv2 on P10 and + later, with r12 and CTR containing the function address. PR96787. */ + +extern void abort (void); +extern int f (int); + +int main () +{ + if (f (3) != 6) + abort (); + return 0; +} + + +int g (int a) +{ + return a * 2; +} + + +int h (int a) +{ + return a + 2; +} + +int __attribute__((__noinline__)) f (int a) +{ + int (*x) (int) = a % 2 ? &g : &h; + (*x) (a); +} +