From patchwork Wed Aug 19 08:02:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: joshua X-Patchwork-Id: 1347593 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=l/0T/GFF; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BWgHY6wYvz9sPf for ; Wed, 19 Aug 2020 18:02:33 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 599103865C10; Wed, 19 Aug 2020 08:02:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 599103865C10 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1597824149; bh=6MiarVsNWXaStqxvxR+StyxFLP5CTKaQ3bb9b9Z/+dY=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=l/0T/GFFcPp+Cnp7jveR57HmIQojeP1DvRQQPaNGlH3hcNegMg7WeJ45j1Kr8LQp/ 0FRue2LQjYX4TZQkiZjmEEITYJjwmU5N9xp5SXsTZHIdceAu/aVHxdxPViaXx75Ymb 3nT3wotqr8JimD1bjNAQJrw+7a87fhHYDWdYv874= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from out30-45.freemail.mail.aliyun.com (out30-45.freemail.mail.aliyun.com [115.124.30.45]) by sourceware.org (Postfix) with ESMTPS id 11D943857C54 for ; Wed, 19 Aug 2020 08:02:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 11D943857C54 X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R791e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=e01e01355; MF=cooper.joshua@linux.alibaba.com; NM=1; PH=DS; RN=2; SR=0; TI=SMTPD_---0U6D8OsC_1597824132; Received: from localhost(mailfrom:cooper.joshua@linux.alibaba.com fp:SMTPD_---0U6D8OsC_1597824132) by smtp.aliyun-inc.com(127.0.0.1); Wed, 19 Aug 2020 16:02:21 +0800 To: gcc Subject: [RISC-V] Add support for AddressSanitizer on RISC-V GCC Date: Wed, 19 Aug 2020 16:02:09 +0800 Message-Id: <20200819080209.133-1-cooper.joshua@linux.alibaba.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-20.0 required=5.0 tests=BAYES_00, ENV_AND_HDR_SPF_MATCH, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, UNPARSEABLE_RELAY, USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Joshua via Gcc-patches From: joshua Reply-To: Joshua Cc: "cooper . joshua" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" From: cooper.joshua gcc/ * config/riscv/riscv.c (asan_shadow_offset): Implement the offset of asan shadow memory for risc-v. (asan_shadow_offset): new macro definition. --- gcc/config/riscv/riscv.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index 63b0c38..b85b459 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -5292,6 +5292,14 @@ riscv_gpr_save_operation_p (rtx op) return true; } +/* Implement TARGET_ASAN_SHADOW_OFFSET. */ + +static unsigned HOST_WIDE_INT +riscv_asan_shadow_offset (void) +{ + return HOST_WIDE_INT_1U << 36; +} + /* Initialize the GCC target structure. */ #undef TARGET_ASM_ALIGNED_HI_OP #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t" @@ -5475,6 +5483,9 @@ riscv_gpr_save_operation_p (rtx op) #undef TARGET_NEW_ADDRESS_PROFITABLE_P #define TARGET_NEW_ADDRESS_PROFITABLE_P riscv_new_address_profitable_p +#undef TARGET_ASAN_SHADOW_OFFSET +#define TARGET_ASAN_SHADOW_OFFSET riscv_asan_shadow_offset + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-riscv.h"