From patchwork Thu Nov 14 10:07:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1194677 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-513344-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="pzgSrlpc"; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="CCOHNKYJ"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47DHH302myz9sNT for ; Thu, 14 Nov 2019 21:07:58 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=HhzwH/ccOrzDIGULRRIa9XYCGNRYJPmBIOvgYmSdUAtYZb/Es5ZDY /J88woaxwRD+JIPbZYevrkd8ZiuG+AbwAOrZTLMKjJDAST3YsqlZIfQMeuPMzeP3 BN63ojQiCsSa1HOvSrHADUbQL2UVPusXAaz1mfb7kb/bxe0qHRc6rk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=H8ywbrHGz6cHUyslId+WGcMd6r4=; b=pzgSrlpcLnVD2u01qJjT PFV2Z5fhC+T6klc+7q22yoQAt+kgxVwZM8hrIeMtwDvMKnAZPK0Ts3vCP9KrSScO CK3QTgaFXI8If4r6A2xaUrdFWvMlwsOGz5hwA9bC4C6JOA/M1wJE0+VmXW4hgpxa hnABDiqKPWyIgPtsMWlMpTo= Received: (qmail 74623 invoked by alias); 14 Nov 2019 10:07:37 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 74578 invoked by uid 89); 14 Nov 2019 10:07:36 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-16.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mail-wr1-f65.google.com Received: from mail-wr1-f65.google.com (HELO mail-wr1-f65.google.com) (209.85.221.65) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 14 Nov 2019 10:07:35 +0000 Received: by mail-wr1-f65.google.com with SMTP id z10so5711705wrs.12 for ; Thu, 14 Nov 2019 02:07:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kv8Pk7QLFje7jijJIJfsJv6Tsk/b8ftTEdiQ5o1gC9k=; b=CCOHNKYJCjqqGyUA+9FJ960Y8btcl2AeaocjRxk7lWi2LtfA/ccvfrvjGh0TQ3H9v1 4ZrYdiVnabTssDCSldIPpC7mEYgoKM/OMOdfX+hkHu+B7qYlo6sPe3G/OCuaasscKtBg rA4gD7/qYQ40oWzTSIWvegjkVz7eTzKNU8AILAUH20FZy7iQNQ+fpNjBF6G6eDbC63Uv kO+zfKEpA4bANdKPMtnm/4EwRdasCut0FaqQxMnAH1JwvLgllMskSGeMd24rjUATyiUs A9kmw+jDLN8xsxUkJ+RuF7gVHgKIzxvrO/gusFTkRP4eMp5A47Cac36lznl3V1ID2d9h TP4w== Received: from localhost.localdomain (184.red-37-158-56.dynamicip.rima-tde.net. [37.158.56.184]) by smtp.gmail.com with ESMTPSA id x26sm5359539wmc.14.2019.11.14.02.07.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2019 02:07:30 -0800 (PST) From: Richard Henderson To: gcc-patches@gcc.gnu.org Cc: richard.earnshaw@arm.com, kyrylo.tkachov@arm.com, richard.sandiford@arm.com Subject: [PATCH v2 1/6] aarch64: Add "c" constraint Date: Thu, 14 Nov 2019 11:07:11 +0100 Message-Id: <20191114100716.28827-2-richard.henderson@linaro.org> In-Reply-To: <20191114100716.28827-1-richard.henderson@linaro.org> References: <20191114100716.28827-1-richard.henderson@linaro.org> Mirror arm in letting "c" match the condition code register. * config/aarch64/constraints.md (c): New constraint. --- gcc/config/aarch64/constraints.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md index d0c3dd5bc1f..b9e5d13e851 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -39,6 +39,10 @@ (define_register_constraint "y" "FP_LO8_REGS" "Floating point and SIMD vector registers V0 - V7.") +(define_constraint "c" + "@internal The condition code register." + (match_operand 0 "cc_register")) + (define_constraint "I" "A constant that can be used with an ADD operation." (and (match_code "const_int")