From patchwork Tue Oct 22 08:13:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Zissulescu X-Patchwork-Id: 1181128 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-511478-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="tKMMCl23"; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="mne6rQNt"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46y5qm4vzrz9sNx for ; Tue, 22 Oct 2019 19:13:38 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version :content-transfer-encoding; q=dns; s=default; b=vnf0lcOBfid5P+10 naGgWWsPG4m4mC48wIiMEX1uT90yHZsM6ahClDFe19kYPlEkaPjKxn6RCaydgcyJ zltH5BLkTtqSm/Y94B9uuCh4pBL830RNTKJJRPQz3lbG1c8f++DEPiYiVvkv3v/I awSRZ3I2+Sc31pZIZdbL3NatWvE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version :content-transfer-encoding; s=default; bh=gV1vugSHtxoDyeXKEPQc3C p02tU=; b=tKMMCl23D2CxF5QqNN8gR5k36DytLx793cWmmwcILzvoMJdJpmO41N AcKKcc958bUb1JVRyZaXyxA2lfd5mi/CPU2ps0eRNdLD3WOGy4+bF8SSQvFICiu1 5GKEdUrsUtmXciD5KkC6LuDJqUgs5iLpPGfZ/tycTa+dCtQPJvMgk= Received: (qmail 82137 invoked by alias); 22 Oct 2019 08:13:31 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 82118 invoked by uid 89); 22 Oct 2019 08:13:31 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=l1, _Bool, _bool X-HELO: mail-wm1-f53.google.com Received: from mail-wm1-f53.google.com (HELO mail-wm1-f53.google.com) (209.85.128.53) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 22 Oct 2019 08:13:28 +0000 Received: by mail-wm1-f53.google.com with SMTP id c22so6090050wmd.1 for ; Tue, 22 Oct 2019 01:13:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=5mB094D/ZsXPOms6+6kR1uAe0ciSYuJEnIVaMUxx5a8=; b=mne6rQNtm/rxP8ZERciL3vWxLk2a1oZCy5o115sy9+Xsqy+aKSamyyzBwwNFBL0lPO K6/vCOxz4b6yzPbsasA0wv8yDtRoWucKR1Hxc7poJnewvOrxD6FhreWfRah9UfHnUqfy YReOgOsVSg/R2UyRiCGqe0MWHcSj1bSrrzlTRPWXOJSJcnJbAUudrPF76b9iqSOWEvIK pe/scDTVhvzHnHfE02zxEvyMPjfw6wpORh4NOF8st3/Kh2QMJC7vM54cuIzOYJyxzfpz LTTifFAabHIYZITR6Mnl+HovZd08GOJWfMac7g/KeNobRSQGmJvzxpzeZCaWOIQ21Xd4 duqg== Received: from localhost.localdomain ([86.121.123.248]) by smtp.gmail.com with ESMTPSA id v16sm17048385wrt.12.2019.10.22.01.13.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2019 01:13:25 -0700 (PDT) From: Claudiu Zissulescu To: gcc-patches@gcc.gnu.org Cc: fbedard@synopsys.com, andrew.burgess@embecosm.com, claziss@synopsys.com, Shahab Vahedi Subject: [PATCH] [ARC] Fix movsi_ne pattern. Date: Tue, 22 Oct 2019 11:13:19 +0300 Message-Id: <20191022081319.16165-1-claziss@gmail.com> MIME-Version: 1.0 X-IsSubscribed: yes From: Shahab Vahedi Hi Andrew, The movsi_ne variants are in a wrong order, leading to wrong computation of the internal attribute "cond". Hence, to errors when outputting annul-true or annul-false instructions. Testcase added. The patch needs to go for trunk and gcc9 branch. OK to apply? Claudiu gcc/ xxxx-xx-xx Claudiu Zissulescu Shahab Vahedi * config/arc/arc.md (movsi_ne): Reorder instruction variants. testsuite/ xxxx-xx-xx Shahab Vahedi * gcc.target/arc/delay-slot-limm.c: New test. --- gcc/config/arc/arc.md | 22 ++++---- .../gcc.target/arc/delay-slot-limm.c | 52 +++++++++++++++++++ 2 files changed, 63 insertions(+), 11 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arc/delay-slot-limm.c diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 9cfde19582c..0bc8ce5378f 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -3782,20 +3782,20 @@ archs4x, archs4xd" ; cond_exec patterns (define_insn "*movsi_ne" [(cond_exec - (ne (match_operand:CC_Z 2 "cc_use_register" "Rcc, Rcc, Rcc,Rcc,Rcc") (const_int 0)) - (set (match_operand:SI 0 "dest_reg_operand" "=Rcq#q,Rcq#q,Rcq#q, w,w") - (match_operand:SI 1 "nonmemory_operand" "C_0, h, ?Cal, Lc,?Cal")))] + (ne (match_operand:CC_Z 2 "cc_use_register" "Rcc,Rcc,Rcc,Rcc,Rcc") (const_int 0)) + (set (match_operand:SI 0 "dest_reg_operand" "=q, q, r, q, r") + (match_operand:SI 1 "nonmemory_operand" "C_0, h, Lr,Cal,Cal")))] "" "@ - * current_insn_predicate = 0; return \"sub%?.ne %0,%0,%0%&\"; - * current_insn_predicate = 0; return \"mov%?.ne %0,%1\"; - * current_insn_predicate = 0; return \"mov%?.ne %0,%1\"; - mov.ne %0,%1 - mov.ne %0,%1" + * current_insn_predicate = 0; return \"sub%?.ne\\t%0,%0,%0\"; + * current_insn_predicate = 0; return \"mov%?.ne\\t%0,%1\"; + mov.ne\\t%0,%1 + * current_insn_predicate = 0; return \"mov%?.ne\\t%0,%1\"; + mov.ne\\t%0,%1" [(set_attr "type" "cmove") - (set_attr "iscompact" "true,true,true_limm,false,false") - (set_attr "length" "2,2,6,4,8") - (set_attr "cpu_facility" "*,av2,av2,*,*")]) + (set_attr "iscompact" "true,true,false,true_limm,false") + (set_attr "length" "2,2,4,6,8") + (set_attr "cpu_facility" "*,av2,*,av2,*")]) (define_insn "*movsi_cond_exec" [(cond_exec diff --git a/gcc/testsuite/gcc.target/arc/delay-slot-limm.c b/gcc/testsuite/gcc.target/arc/delay-slot-limm.c new file mode 100644 index 00000000000..e5de3c4badd --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/delay-slot-limm.c @@ -0,0 +1,52 @@ +/* We have encountered an issue that a "mov_s.ne" instruction * + * with an immediate value was put in the delay slot of a * + * branch: * + * * + * bne.d @.L1 # 33 [c=20 l=4] *branch_insn * + * mov_s.ne r0,7 # 35 [c=0 l=6] *movsi_ne/2 * + * * + * This is not sanctioned and must not happen. The test below * + * is a reduced version of the source code leading to the * + * problem. */ + +/* { dg-do compile } */ +/* { dg-skip-if "" { ! { clmcpu } } } */ +/* { dg-options "-mcpu=archs -Og" } */ +typedef struct +{ + struct + { + int length; + } table; +} room; + +struct house +{ + room *r; +}; + +int glob; + +_Bool bar(); + +int func(struct house *h, int i, int whatever) +{ + for (;;) + { + _Bool a; + if (h && h->r[i].table.length == glob) + { + if (whatever) + { + a = bar(); + if (__builtin_expect(!a, 0)) + return 7; + } + break; + } + } + return 0; +} + +/* no 'mov_s.ne r,limm' in a delay slot */ +/* { dg-final { scan-assembler-not "bne.d\.*\n\\s\+mov_s.ne\\s+r\[0-9\]+,7" } } */