@@ -346,7 +346,7 @@ extern int darwin_emit_branch_islands;
&& reg_class_subset_p (BASE_REGS, (CLASS))) \
? BASE_REGS \
: (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
- && (CLASS) == NON_SPECIAL_REGS) \
+ && (CLASS) == GEN_OR_FLOAT_REGS) \
? GENERAL_REGS \
: (CLASS))
@@ -20236,7 +20236,7 @@ rs6000_preferred_reload_class (rtx x, enum reg_class rclass)
return NO_REGS;
}
- if (GET_MODE_CLASS (mode) == MODE_INT && rclass == NON_SPECIAL_REGS)
+ if (GET_MODE_CLASS (mode) == MODE_INT && rclass == GEN_OR_FLOAT_REGS)
return GENERAL_REGS;
return rclass;
@@ -20384,7 +20384,7 @@ rs6000_secondary_reload_class (enum reg_class rclass, machine_mode mode,
/* Constants, memory, and FP registers can go into FP registers. */
if ((regno == -1 || FP_REGNO_P (regno))
- && (rclass == FLOAT_REGS || rclass == NON_SPECIAL_REGS))
+ && (rclass == FLOAT_REGS || rclass == GEN_OR_FLOAT_REGS))
return (mode != SDmode || lra_in_progress) ? NO_REGS : GENERAL_REGS;
/* Memory, and AltiVec registers can go into AltiVec registers. */
@@ -36154,7 +36154,7 @@ rs6000_libcall_value (machine_mode mode)
}
/* Compute register pressure classes. We implement the target hook to avoid
- IRA picking something like NON_SPECIAL_REGS as a pressure class, which can
+ IRA picking something like GEN_OR_FLOAT_REGS as a pressure class, which can
lead to incorrect estimates of number of available registers and therefor
increased register pressure/spill. */
static int
@@ -1138,7 +1138,7 @@ enum reg_class
VRSAVE_REGS,
VSCR_REGS,
SPR_REGS,
- NON_SPECIAL_REGS,
+ GEN_OR_FLOAT_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
@@ -1167,7 +1167,7 @@ enum reg_class
"VRSAVE_REGS", \
"VSCR_REGS", \
"SPR_REGS", \
- "NON_SPECIAL_REGS", \
+ "GEN_OR_FLOAT_REGS", \
"LINK_REGS", \
"CTR_REGS", \
"LINK_OR_CTR_REGS", \
@@ -1204,7 +1204,7 @@ enum reg_class
{ 0x00000000, 0x00000000, 0x00000000, 0x00004000 }, \
/* SPR_REGS. */ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00010000 }, \
- /* NON_SPECIAL_REGS. */ \
+ /* GEN_OR_FLOAT_REGS. */ \
{ 0xffffffff, 0xffffffff, 0x00000008, 0x00008000 }, \
/* LINK_REGS. */ \
{ 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, \