From patchwork Tue Nov 13 03:05:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Modra X-Patchwork-Id: 996764 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-489811-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="d5Gyr3oN"; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MuQFEygN"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42vCF51Glcz9s47 for ; Tue, 13 Nov 2018 14:05:59 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=noH3NjI/lhj6dqrIFTEbU6YDao/Eg/lnkz/sV1aXhHqRqvL3wt 4ahCi+zGmNPUX4PhCoQRj2r64AfLYatZ1ZcqnVkEVZrxxAnjaS6Y11hTpTvrd3Bs VUHAHL/OhTvrJPbaHJXeZu4C63nvb2+5mw0E3vCnSV2KdswF5y1/KvjhE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=1B7DfTp7Z+06+hWtazS219QMIw0=; b=d5Gyr3oNWdaKfmVNDYJl lxp1nL9n122hD2RD0VXqMVK+yOUyn1urAQphr7aLJjoQxZ6JqcXB2txv2OiN1INI 3X/XmwLUB4kwufBKtBNh/BwW8j6E9Nr+s4DYZJrYHaLNy48igAW1mELFdOk69vMy DYCOO3F4U6J6I0GAX8QgKnU= Received: (qmail 93945 invoked by alias); 13 Nov 2018 03:05:52 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 93924 invoked by uid 89); 13 Nov 2018 03:05:51 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=yr, HX-HELO:sk:mail-pf X-HELO: mail-pf1-f181.google.com Received: from mail-pf1-f181.google.com (HELO mail-pf1-f181.google.com) (209.85.210.181) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 13 Nov 2018 03:05:49 +0000 Received: by mail-pf1-f181.google.com with SMTP id g62so2019209pfd.12 for ; Mon, 12 Nov 2018 19:05:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:mime-version:content-disposition :user-agent; bh=eYNQmmMSW+4M2VPTnF+bbv1Gr6KtTuMeJlLNnxWICH8=; b=MuQFEygNTxpOxAGeOz3MOb7INHFXWlezCeJl8bviwA8res4mMT57wiLlnb2uREdGWx d8yfHkZ/a/yzRWfo1qnK3aoiJf+jK9irAlphFFd0D648GoLkpXJcKq+HrpMgoLH30WcG rVDwsn0Uivmw+xqMqzrJ8bGUw5I9jOjMTaVb8ivL68extsRXzJj1IiQ70P/RSV4ycYFo j6Fn6CmOWXOBHjdvS3EPhJjvKKJn/m/NAbCvDfOu2dRk6drHQhX4WIqghn+VSkgKhnSt guBlwKiDwnULSxGG4pjLvNABxZgqk+nocIZ7LVWsyO0kqZvJh0pzqQfI46qu4Zh96WSi AJ7Q== Received: from bubble.grove.modra.org ([58.175.241.133]) by smtp.gmail.com with ESMTPSA id x3sm12711157pgt.45.2018.11.12.19.05.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Nov 2018 19:05:46 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id 9F47C804D6; Tue, 13 Nov 2018 13:35:42 +1030 (ACDT) Date: Tue, 13 Nov 2018 13:35:42 +1030 From: Alan Modra To: gcc-patches@gcc.gnu.org Cc: Segher Boessenkool Subject: [RS6000] Ignore "c", "l" and "h" for register preference Message-ID: <20181113030542.GI29784@bubble.grove.modra.org> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.9.4 (2018-02-28) X-IsSubscribed: yes This catches a few places where move insn patterns don't slightly disparage CTR, LR and VRSAVE regs. Also fixes the doc for the rs6000 h constraint, and removes an r->cl alternative covered by r->h. Segher okayed a patch adding "*" like this patch a long time ago. Somehow I never committed it. This one does a few more things as well, but I think it's sufficiently obvious to commit as such. Bootstrapped etc. powerpc64le-linux and committed rev 266044. * gcc/doc/md.texi (Machine Constraints): Correct rs6000 h constraint description. * config/rs6000/rs6000.md (movsi_internal1): Delete MT%0 case covered by alternative. (movcc_internal1): Ignore h for register preference. (mov_hardfloat64): Likewise. (mov_softfloat): Ignore c, l, h for register preference. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 16f37dafbb9..02e6e084785 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -6842,21 +6842,21 @@ (define_insn "movsi_low" ;; STW STFIWX STXSIWX LI LIS ;; # XXLOR XXSPLTIB 0 XXSPLTIB -1 VSPLTISW ;; XXLXOR 0 XXLORC -1 P9 const MTVSRWZ MFVSRWZ -;; MF%1 MT%0 MT%0 NOP +;; MF%1 MT%0 NOP (define_insn "*movsi_internal1" [(set (match_operand:SI 0 "nonimmediate_operand" "=r, r, r, ?*wI, ?*wH, m, ?Z, ?Z, r, r, r, ?*wIwH, ?*wJwK, ?*wJwK, ?*wu, ?*wJwK, ?*wH, ?*wK, ?*wIwH, ?r, - r, *c*l, *h, *h") + r, *h, *h") (match_operand:SI 1 "input_operand" "r, U, m, Z, Z, r, wI, wH, I, L, n, wIwH, O, wM, wB, O, wM, wS, r, wIwH, - *h, r, r, 0"))] + *h, r, 0"))] "gpc_reg_operand (operands[0], SImode) || gpc_reg_operand (operands[1], SImode)" @@ -6883,21 +6883,20 @@ (define_insn "*movsi_internal1" mfvsrwz %0,%x1 mf%1 %0 mt%0 %1 - mt%0 %1 nop" [(set_attr "type" "*, *, load, fpload, fpload, store, fpstore, fpstore, *, *, *, veclogical, vecsimple, vecsimple, vecsimple, veclogical, veclogical, vecsimple, mffgpr, mftgpr, - *, *, *, *") + *, *, *") (set_attr "length" "4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 8, 4, 4, - 4, 4, 4, 4")]) + 4, 4, 4")]) ;; Like movsi, but adjust a SF value to be used in a SI context, i.e. ;; (set (reg:SI ...) (subreg:SI (reg:SF ...) 0)) @@ -7175,9 +7174,9 @@ (define_expand "movcc" (define_insn "*movcc_internal1" [(set (match_operand:CC 0 "nonimmediate_operand" - "=y,x,?y,y,r,r,r,r,r,*c*l,r,m") + "=y,x,?y,y,r,r,r,r, r,*c*l,r,m") (match_operand:CC 1 "general_operand" - " y,r, r,O,x,y,r,I,h, r,m,r"))] + " y,r, r,O,x,y,r,I,*h, r,m,r"))] "register_operand (operands[0], CCmode) || register_operand (operands[1], CCmode)" "@ @@ -7329,11 +7328,11 @@ (define_insn "movsd_hardfloat" ;; LIS G-const. F/n-const NOP (define_insn "*mov_softfloat" [(set (match_operand:FMOVE32 0 "nonimmediate_operand" - "=r, cl, r, r, m, r, + "=r, *c*l, r, r, m, r, r, r, r, *h") (match_operand:FMOVE32 1 "input_operand" - "r, r, h, m, r, I, + "r, r, *h, m, r, I, L, G, Fn, 0"))] "(gpc_reg_operand (operands[0], mode) @@ -7600,7 +7599,7 @@ (define_insn "*mov_hardfloat64" (match_operand:FMOVE64 1 "input_operand" "d, m, d, wY, , Z, , , , , - r, YZ, r, r, h, + r, YZ, r, r, *h, 0, wg, r, , r"))] "TARGET_POWERPC64 && TARGET_HARD_FLOAT @@ -7641,11 +7640,11 @@ (define_insn "*mov_hardfloat64" (define_insn "*mov_softfloat64" [(set (match_operand:FMOVE64 0 "nonimmediate_operand" - "=Y, r, r, cl, r, r, + "=Y, r, r, *c*l, r, r, r, r, *h") (match_operand:FMOVE64 1 "input_operand" - "r, Y, r, r, h, G, + "r, Y, r, r, *h, G, H, F, 0"))] "TARGET_POWERPC64 && TARGET_SOFT_FLOAT diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index e5002e29d6f..1c37a053a94 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3273,7 +3273,7 @@ instructions. Vector constant that can be loaded with XXSPLTIB & sign extension. @item h -@samp{MQ}, @samp{CTR}, or @samp{LINK} register +@samp{VRSAVE}, @samp{CTR}, or @samp{LINK} register @item c @samp{CTR} register