From patchwork Tue Jan 16 10:04:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tamar Christina X-Patchwork-Id: 861385 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-471345-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="x8qVJN6y"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zLQnh2cMxz9sDB for ; Tue, 16 Jan 2018 21:05:11 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; 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Ok for cvs? Thanks, Tamar Index: htdocs/gcc-8/changes.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v retrieving revision 1.26 diff -u -r1.26 changes.html --- htdocs/gcc-8/changes.html 11 Jan 2018 09:31:53 -0000 1.26 +++ htdocs/gcc-8/changes.html 11 Jan 2018 15:47:15 -0000 @@ -147,7 +147,51 @@

AArch64

    -
  • +
  • + The Armv8.4-A architecture is now supported. It can be used by + specifying the -march=armv8.4-a option. +
    • +
  • + The Dot Product instructions are now supported as an optional extension to the + Armv8.2-A architecture and newer and are mandatory on Armv8.4-A. The extension can be used by + specifying the +dotprod architecture extension. E.g. -march=armv8.2-a+dotprod. +
    • +
  • + The Armv8-A +crypto extension has now been split into two extensions for finer grained control: +
      +
    • +aes which contains the Armv8-A AES crytographic instructions.
      • +
    • +sha2 which contains the Armv8-A SHA2 and SHA1 cryptographic instructions.
      • +
    + Using +crypto will now enable these two extensions. +
    • +
  • + New Armv8.4-A FP16 Floating Point Multiplication Variant instructions have been added. These instructions are + mandatory in Armv8.4-A but available as an optional extension to Armv8.2-A and Armv8.3-A. The new extension + can be used by specifying the +fp16fml architectural extension on Armv8.2-A and Armv8.3-A. On Armv8.4-A + the instructions can be enabled by specifying +fp16. +
    • +
  • + New cryptographic instructions have been added as optional extensions to Armv8.2-A and newer. These instructions can + be enabled with: +
      +
    • +sha3 New SHA3 and SHA2 instructions from Armv8.4-A. This implies +sha2. +
    • +sm4 New SM3 and SM4 instructions from Armv8.4-A. +
    +
    • +
  • + Support has been added for the following processors + (GCC identifiers in parentheses): +
      +
    • Arm Cortex-A75 (cortex-a75).
      • +
    • Arm Cortex-A55 (cortex-a55).
      • +
    • Arm Cortex-A55/Cortex-A75 DynamIQ big.LITTLE (cortex-a75.cortex-a55).
      • +
    + The GCC identifiers can be used + as arguments to the -mcpu or -mtune options, + for example: -mcpu=cortex-a75 or + -mtune=thunderx2t99p1 or as arguments to the equivalent target + attributes and pragmas. +

ARM

@@ -169,14 +213,58 @@ removed in a future release.
  • - The default link behavior for ARMv6 and ARMv7-R targets has been + The default link behavior for Armv6 and Armv7-R targets has been changed to produce BE8 format when generating big-endian images. A new flag -mbe32 can be used to force the linker to produce legacy BE32 format images. There is no change of behavior for - ARMv6-m and other ARMv7 or later targets: these already defaulted + Armv6-M and other Armv7 or later targets: these already defaulted to BE8 format. This change brings GCC into alignment with other compilers for the ARM architecture.
    • +
  • + The Armv8-R architecture is now supported. It can be used by specifying the + -march=armv8-r option. +
    • +
  • + The Armv8.3-A architecture is now supported. It can be used by + specifying the -march=armv8.3-a option. +
    • +
  • + The Armv8.4-A architecture is now supported. It can be used by + specifying the -march=armv8.4-a option. +
    • +
  • + The Dot Product instructions are now supported as an optional extension to the + Armv8.2-A architecture and newer and are mandatory on Armv8.4-A. The extension can be used by + specifying the +dotprod architecture extension. E.g. -march=armv8.2-a+dotprod. +
    • + +
  • + Support for setting extensions and architectures using the GCC target pragma and attribute has been added. + It can be used by specifying #pragma GCC target ("arch=..."), #pragma GCC target ("+extension"), + __attribute__((target("arch=..."))) or __attribute__((target("+extension"))). +
    • +
  • + New Armv8.4-A FP16 Floating Point Multiplication Variant instructions have been added. These instructions are + mandatory in Armv8.4-A but available as an optional extension to Armv8.2-A and Armv8.3-A. The new extension + can be used by specifying the +fp16fml architectural extension on Armv8.2-A and Armv8.3-A. On Armv8.4-A + the instructions can be enabled by specifying +fp16. +
    • +
  • + Support has been added for the following processors + (GCC identifiers in parentheses): +
      +
    • Arm Cortex-A75 (cortex-a75).
      • +
    • Arm Cortex-A55 (cortex-a55).
      • +
    • Arm Cortex-A55/Cortex-A75 DynamIQ big.LITTLE (cortex-a75.cortex-a55).
      • +
    • Arm Cortex-R52 for Armv8-R (cortex-r52).
      • +
    + The GCC identifiers can be used + as arguments to the -mcpu or -mtune options, + for example: -mcpu=cortex-a75 or + -mtune=xgene1 or as arguments to the equivalent target + attributes and pragmas. +

    • AVR