From patchwork Mon Oct 2 13:20:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tamar Christina X-Patchwork-Id: 820481 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-463332-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="SzHrjguW"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y5N8Q4rGkz9sPs for ; Tue, 3 Oct 2017 00:20:53 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=Dy4rO5fjwBrV/8fkzas9KZPZVWqrXCqXU3ycGt/JFZ2U7c/RhB FwgUOISHa95fKCMAXwyH84jGqRYBd4Cqfmb5ncqBuEGZGoQF/7AT5h+em+SvNRUw xCv37CYeBSYcY3TqPefPx1IjpVJliaPjksOoKwwXudozja21A1Qr5rWg0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=Xofu3+fGRZtQVYLE4HdTzu+2BY8=; b=SzHrjguW2+IMV1Ncpp+S 2CcD+LNfGSrn7wqP8QwwNZE6bg2wG25RBeGziOZMKpXQgfczRCxRA/jpARjk9qsj vu1v7gmWmFbGwpZEqbqIgPRdp5Zf4NVWNgIyOsVNDCTdVu5YMrcNSj3XOmQJ/p/v YCXBdZi+m/8ntyfK0GsTg00= Received: (qmail 8364 invoked by alias); 2 Oct 2017 13:20:42 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 8351 invoked by uid 89); 2 Oct 2017 13:20:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LOTSOFHASH, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: EUR01-VE1-obe.outbound.protection.outlook.com Received: from mail-ve1eur01on0079.outbound.protection.outlook.com (HELO EUR01-VE1-obe.outbound.protection.outlook.com) (104.47.1.79) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 02 Oct 2017 13:20:39 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Tamar.Christina@arm.com; Received: from arm.com (217.140.96.140) by DB6PR0802MB2312.eurprd08.prod.outlook.com (2603:10a6:4:86::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.77.7; Mon, 2 Oct 2017 13:20:35 +0000 Date: Mon, 2 Oct 2017 14:20:34 +0100 From: Tamar Christina To: gcc-patches@gcc.gnu.org Cc: nd@arm.com, law@redhat.com, rguenther@suse.de, ian@airs.com, james.greenhalgh@arm.com, Richard.Earnshaw@arm.com, Marcus.Shawcroft@arm.com, Ramana.Radhakrishnan@arm.com Subject: [GCC][PATCH][testsuite][mid-end] Fix failing slp test on aarch64 and arm. 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This means that two of the loops get vectorized instead of just 1. So update the conditions to include a check for neon. Regtested on aarch64-none-elf. Respin of patch https://gcc.gnu.org/ml/gcc-patches/2017-09/msg01805.html Ok for trunk? Thanks, Tamar. gcc/testsuite/ 2017-10-02 Tamar Christina * gcc.dg/vect/slp-perm-9.c: Use vect_sizes_16B_8B. * lib/target-supports.exp (vect_sizes_16B_8B): New. gcc/doc * sourcebuild.texi (vect_sizes_16B_8B, vect_sizes_32B_16B): New. diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 56e1b4eb103ab412b29d6dcd9b556515ebc2ac63..98cebf7b58798abdcaa108daadcd6273667dc785 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1507,6 +1507,12 @@ Target supports conversion from @code{float} to @code{unsigned int}. @item vect_max_reduc Target supports max reduction for vectors. + +@item vect_sizes_16B_8B +Target supports 16- and 8-bytes vectors. + +@item vect_sizes_32B_16B +Target supports 32- and 16-bytes vectors. @end table @subsubsection Thread Local Storage attributes diff --git a/gcc/testsuite/gcc.dg/vect/slp-perm-9.c b/gcc/testsuite/gcc.dg/vect/slp-perm-9.c index 4d9c11dcc476a8023b3eaac2ae76cc01bd0db182..b9b5a3b87ad031a5ab7421efce2c2b0fdf9145f3 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-perm-9.c +++ b/gcc/testsuite/gcc.dg/vect/slp-perm-9.c @@ -54,8 +54,8 @@ int main (int argc, const char* argv[]) return 0; } -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { {! vect_perm } || {! vect_sizes_32B_16B } } } } } */ -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { { vect_perm } && { vect_sizes_32B_16B } } } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { {! vect_perm } || {! vect_sizes_16B_8B } } } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { { vect_perm } && { vect_sizes_16B_8B } } } } } */ /* { dg-final { scan-tree-dump-times "permutation requires at least three vectors" 1 "vect" { target vect_perm_short } } } */ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { {! vect_perm } || {! vect_sizes_32B_16B } } } } } */ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { { vect_perm } && { vect_sizes_32B_16B } } } } } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 57f646ce2df5bcd5619870403242e73f6e91ff77..8ad9b602d277c28a6e34942a564d2ce05da7857f 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -7561,6 +7561,19 @@ proc check_effective_target_vect_sizes_32B_16B { } { } } +# Return true if 16- and 8-bytes vectors are available. + +proc check_effective_target_vect_sizes_16B_8B { } { + if { [check_avx_available] + || [is-effective-target arm_neon] + || [istarget aarch64*-*-*] } { + return 1; + } else { + return 0; + } +} + + # Return true if 128-bits vectors are preferred even if 256-bits vectors # are available.