Message ID | 20170801150510.GA11610@arm.com |
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State | New |
Headers | show
Return-Path: <gcc-patches-return-459531-incoming=patchwork.ozlabs.org@gcc.gnu.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-459531-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="hhvA1Vg8"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xMKPp3vRlz9tWN for <incoming@patchwork.ozlabs.org>; Wed, 2 Aug 2017 01:05:33 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=lgknczeOpKAzTcznUaCyoGTxwoYgJ0jUNNJr5OYMnUVvaXrTYs 0fPtTZooDgXFKwoTbXs1m30JlyD0i4ehDDozFEOrwVk0/nuxym3njcw6CMdDsY7H xi1DkL4p+aKvc16c3N0HqIqIe49VyI9fBBOHbaHhS8bdkoXUGN+jxF1UE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=QiAW1i/DOYQqBmKMHYWwYJMpSgc=; b=hhvA1Vg857SAxZIoi4l2 esWiyGtcDP59ZSL6xqcx60uTEKALiiF1KIhBwwGniXY3c0zdgm8jMl3R/Yqb+V8S 3NmPgzoGu5apcWFvEQo1yoRtTsOI1golc4MifnRIwNDgDOklSXfdQJ5lOfTgzG4y n6gti7YaIDzP03OvwF7bWUU= Received: (qmail 5038 invoked by alias); 1 Aug 2017 15:05:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: <gcc-patches.gcc.gnu.org> List-Unsubscribe: <mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org> List-Archive: <http://gcc.gnu.org/ml/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-help@gcc.gnu.org> Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 4987 invoked by uid 89); 1 Aug 2017 15:05:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy=H*r:sk:mail-he, H*r:104.47.0, HX-Exchange-Antispam-Report-Test:131327999870524, Hx-languages-length:1260 X-HELO: EUR01-HE1-obe.outbound.protection.outlook.com Received: from mail-he1eur01on0089.outbound.protection.outlook.com (HELO EUR01-HE1-obe.outbound.protection.outlook.com) (104.47.0.89) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 01 Aug 2017 15:05:22 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Tamar.Christina@arm.com; Received: from arm.com (217.140.96.140) by AM4PR0802MB2307.eurprd08.prod.outlook.com (2603:10a6:200:5f::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1304.22; Tue, 1 Aug 2017 15:05:18 +0000 Date: Tue, 1 Aug 2017 16:05:13 +0100 From: Tamar Christina <tamar.christina@arm.com> To: gcc-patches@gcc.gnu.org Cc: nd@arm.com, james.greenhalgh@arm.com, Richard.Earnshaw@arm.com, Marcus.Shawcroft@arm.com Subject: [GCC]][AArch64][PATCH] Fix big endian float immediate moves. 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On Tue, Aug 01, 2017 at 04:05:13PM +0100, Tamar Christina wrote: > Hi All, > > real_to_target seems to return the order of the elements in the array > differently depending on the endiannes. This undoes the endianness when > combining the values back to a HOST_WIDE_INT. > > Regtested on aach64-none-linux-gnu and aarch64_be-none-linux-gnu and no issues. OK. But... > + ival |= (zext_hwi (res[1-order], 32) << 32); Spaces either side of the '-' please. Cheers, James
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 5a2ad7e9156a6f0389c09470cf1414bff45d8099..84e0c937665a02f06e15ddf334978fe2a0da565f 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -4733,9 +4733,14 @@ aarch64_reinterpret_float_as_int (rtx value, unsigned HOST_WIDE_INT *intval) CONST_DOUBLE_REAL_VALUE (value), REAL_MODE_FORMAT (mode)); - ival = zext_hwi (res[0], 32); - if (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (DFmode)) - ival |= (zext_hwi (res[1], 32) << 32); + if (mode == DFmode) + { + int order = BYTES_BIG_ENDIAN ? 1 : 0; + ival = zext_hwi (res[order], 32); + ival |= (zext_hwi (res[1-order], 32) << 32); + } + else + ival = zext_hwi (res[0], 32); *intval = ival; return true;