Message ID | 20170801073502.GA19631@arm.com |
---|---|
State | New |
Headers | show
Return-Path: <gcc-patches-return-459457-incoming=patchwork.ozlabs.org@gcc.gnu.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-459457-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="Mxpk4+dk"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xM7QV5vdPz9tWW for <incoming@patchwork.ozlabs.org>; Tue, 1 Aug 2017 17:35:27 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=Et/TNyIUbp9DzLI5swOlLj6TflNKW0hxOo4oj6iVQoJgT8EID6 7Zh/85LdqSF0HU9KmxPrCveuYvTJ1omjIVeNeGgrKZraQXiKc+9yzmWc1+I+ih/X dFKBbG02krFKDN21Vce317Fz/YzArogpOjwyB6LwUkZx3zEInLwMx8GSk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=nfwkLgnQnytLUNw1knuWs/PKvVo=; b=Mxpk4+dkB8OkSKM+f06T P23BF1o6qTJlfn41OolHCn++UYbl1N8wLZcUWs2q/IQKDoYEFcyd/hW81wg+1kqU U7HrlKhjy+AyieSBXPQ6zNsRrERIISaWGutIUBTbo6xYlejrGawpxwtcJVflx15R JsY/TM06mXCn1Nn+Fle4S0w= Received: (qmail 107742 invoked by alias); 1 Aug 2017 07:35:19 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: <gcc-patches.gcc.gnu.org> List-Unsubscribe: <mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org> List-Archive: <http://gcc.gnu.org/ml/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-help@gcc.gnu.org> Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 102675 invoked by uid 89); 1 Aug 2017 07:35:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1665, integrity, Tamar, tamar X-HELO: EUR03-VE1-obe.outbound.protection.outlook.com Received: from mail-eopbgr50079.outbound.protection.outlook.com (HELO EUR03-VE1-obe.outbound.protection.outlook.com) (40.107.5.79) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 01 Aug 2017 07:35:13 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Tamar.Christina@arm.com; Received: from arm.com (217.140.96.140) by AM4PR0802MB2308.eurprd08.prod.outlook.com (2603:10a6:200:5f::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1304.22; Tue, 1 Aug 2017 07:35:09 +0000 Date: Tue, 1 Aug 2017 08:35:06 +0100 From: Tamar Christina <tamar.christina@arm.com> To: gcc-patches@gcc.gnu.org Cc: nd@arm.com, james.greenhalgh@arm.com, Richard.Earnshaw@arm.com, Marcus.Shawcroft@arm.com Subject: [GCC][AArch64][PATHC] Only allow 0s unconditionally for floating point values. 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On Tue, Aug 01, 2017 at 08:35:06AM +0100, Tamar Christina wrote: > Hi All, > > Previously I allowed 0s unconditionally through aarch64_can_const_movi_rtx_p > because we should always be able to use movi with 0 regardless of the mode. > > However this was causing issues when a vector contained a 0 element and > another value which was too complex for a movi. In theory this should have > worked but it's failing an integrity check because of the type of the 0 element > being a none floating type. > > Moving the exception to only allow floating point 0s restores the previous > behavior of the compiler. > > Ok for trunk? OK. Thanks, James > > Bootstrapped and regtested on aach64-none-linux-gnu and no issues. > > Thanks, > Tamar > > > gcc/ > 2017-08-01 Tamar Christina <tamar.christina@arm.com> > > * config/aarch64/aarch64.c > (aarch64_can_const_movi_rtx_p): Move 0 check. > > --
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 055ebafb8305412e192c77e4177d08c914d5ccee..5a2ad7e9156a6f0389c09470cf1414bff45d8099 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -4787,10 +4787,6 @@ aarch64_can_const_movi_rtx_p (rtx x, machine_mode mode) if (!TARGET_SIMD) return false; - /* We make a general exception for 0. */ - if (aarch64_float_const_zero_rtx_p (x)) - return true; - machine_mode vmode, imode; unsigned HOST_WIDE_INT ival; @@ -4800,6 +4796,10 @@ aarch64_can_const_movi_rtx_p (rtx x, machine_mode mode) if (!aarch64_reinterpret_float_as_int (x, &ival)) return false; + /* We make a general exception for 0. */ + if (aarch64_float_const_zero_rtx_p (x)) + return true; + imode = int_mode_for_mode (mode); } else if (GET_CODE (x) == CONST_INT