From patchwork Wed Nov 30 05:55:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Meissner X-Patchwork-Id: 700868 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tT8mG4R1cz9t2g for ; Wed, 30 Nov 2016 16:55:57 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="ymkJy4i0"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:mime-version:content-type:message-id; q=dns; s= default; b=G01oS1YYQilg5wvID6UOwc1tV1KHYv9tCzEFPIiqcfLQPcbtBacFZ oXwf1UIIFtsM4KDKyitBRINryZj2yrZ7T9ySLx0pKaFBBdOgMmJBdgjNP+Kp0Xg1 3IlojgmIV3xnKkxI7g5STTp+DfEeCsT0uhav0REPMdFDjx4nghjr98= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:mime-version:content-type:message-id; s= default; bh=gMvy+opDesEH33q+zSF1uQYzANU=; b=ymkJy4i0l3sF6Xdwlqfb Bcn6Si7wTzwbppUnlILcgRKb7tFxRDm5uZS8C14ek2AQdwLlcOVjpHuX5a+ZmGHc zSaBHFQIPX8cHs6dEK4+EWuyKl8PHl8DSIbfdFUJzAbXPiSKI3uZiG9U56ZBWkYr M1SvyTWkqO2d2/aFi/UO8oc= Received: (qmail 108086 invoked by alias); 30 Nov 2016 05:55:49 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 106418 invoked by uid 89); 30 Nov 2016 05:55:48 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.2 required=5.0 tests=AWL, BAYES_00, KAM_ASCII_DIVIDERS, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_LOW, RCVD_IN_SEMBACKSCATTER autolearn=no version=3.3.2 spammy=King, king, vsxmd, vsx.md X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 30 Nov 2016 05:55:38 +0000 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id uAU5sW2x094338 for ; Wed, 30 Nov 2016 00:55:36 -0500 Received: from e19.ny.us.ibm.com (e19.ny.us.ibm.com [129.33.205.209]) by mx0a-001b2d01.pphosted.com with ESMTP id 271qjef2rh-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 30 Nov 2016 00:55:35 -0500 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 30 Nov 2016 00:55:30 -0500 Received: from b01cxnp23032.gho.pok.ibm.com (b01cxnp23032.gho.pok.ibm.com [9.57.198.27]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id F35A3C90043; Wed, 30 Nov 2016 00:55:13 -0500 (EST) Received: from b01ledav002.gho.pok.ibm.com (b01ledav002.gho.pok.ibm.com [9.57.199.107]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id uAU5tU5f14877150; Wed, 30 Nov 2016 05:55:30 GMT Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 36DBB124044; Wed, 30 Nov 2016 00:55:30 -0500 (EST) Received: from ibm-tiger.the-meissners.org (unknown [9.32.77.111]) by b01ledav002.gho.pok.ibm.com (Postfix) with ESMTP id 12591124037; Wed, 30 Nov 2016 00:55:30 -0500 (EST) Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id 7CA3345EA3; Wed, 30 Nov 2016 00:55:29 -0500 (EST) Date: Wed, 30 Nov 2016 00:55:29 -0500 From: Michael Meissner To: gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Bill Schmidt Subject: [PATCH] Fix prs 78602 & 78560 on PowerPC (vec_extract/vec_sec) Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Bill Schmidt MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16113005-0056-0000-0000-000002138DE4 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006167; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000193; SDB=6.00787212; UDB=6.00380766; IPR=6.00564896; BA=6.00004929; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00013486; XFM=3.00000011; UTC=2016-11-30 05:55:32 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16113005-0057-0000-0000-000006469A64 Message-Id: <20161130055529.GA15077@ibm-tiger.the-meissners.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-11-30_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1611300097 X-IsSubscribed: yes These two patches to fix PRs 78602 and 78560 fix aspects of the vector set and extract code I've been working on in the last couple of months. The two symptoms were essentially the same thing, one on vector set and the other on vector extract. The core issue was both set and extract did not verify an argument that should have been in a register, actually was in a register, and generated code that raised an insn not found message. PR 78602 was an error that I found in working with the next set of patches for vector extract, where it would generate the insn not found message if the test cases were compiled without optimization. The solution was to call force_reg if the element number wasn't a register or constant. PR 78560 was the opposite, in that it was on vector set, and it showed up with -O3 optimization level. Like 78602, the answer was to call force_reg to force the value being set into a vector element into a register. Once the initial bug in 78560 was fixed, a secondary bug reared its head, in that the calculation for the elment being set was a bit offset, when instead it should have been a byte offset. The assembler complained when the offset field was not between 0..15. I have done full bootstraps and make check with no regressions on a little endian power8 (64-bit only), a big endian power8 (64-bit only), and a big endian power7 (both 32-bit and 64-bit). Cann I install both patches to the trunk? 2016-11-29 Michael Meissner PR target/78602 * config/rs6000/rs6000.c (rs6000_expand_vector_extract): If the element is not a constant or in a register, force it to a register. 2016-11-29 Michael Meissner PR target/78560 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Force value that will be set to a vector element to be in a register. * config/rs6000/vsx.md (vsx_set__p9): Fix thinko that used the wrong multiplier to convert the element number to a byte offset. Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 242972) +++ gcc/config/rs6000/rs6000.c (revision 242973) @@ -7257,6 +7257,8 @@ rs6000_expand_vector_extract (rtx target convert_move (tmp, elt, 0); elt = tmp; } + else if (!REG_P (elt)) + elt = force_reg (DImode, elt); switch (mode) {