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[86.150.45.249]) by smtp.gmail.com with ESMTPSA id ju3sm16803541wjb.11.2016.04.29.15.17.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Apr 2016 15:17:21 -0700 (PDT) Date: Fri, 29 Apr 2016 23:17:13 +0100 From: Andrew Burgess To: Claudiu Zissulescu , Joern Wolfgang Rennecke Cc: "gcc-patches@gcc.gnu.org" , "noamca@mellanox.com" Subject: Re: [PATCHv2 0/7] ARC: Add support for nps400 variant Message-ID: <20160429221713.GI1592@embecosm.com> References: <57222CCF.1090109@amylaar.uk> <57224071.1020905@amylaar.uk> <098ECE41A0A6114BB2A07F1EC238DE896618A1BF@de02wembxa.internal.synopsys.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <098ECE41A0A6114BB2A07F1EC238DE896618A1BF@de02wembxa.internal.synopsys.com> X-Editor: GNU Emacs [ http://www.gnu.org/software/emacs ] User-Agent: Mutt/1.5.24 (2015-08-30) X-IsSubscribed: yes * Claudiu Zissulescu [2016-04-29 09:03:53 +0000]: > I see the next tests failing: > > FAIL: gcc.target/arc/movb-1.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+, *r[0-5]+, *19, *21, *8 > FAIL: gcc.target/arc/movb-2.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+, *r[0-5]+, *23, *23, *9 > FAIL: gcc.target/arc/movb-5.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+, *r[0-5]+, *23, *(23|7), *9 > FAIL: gcc.target/arc/movh_cl-1.c scan-assembler movh.cl r[0-9]+,0xc0000000>>16 Claudiu, Joern, I believe that the patch below should resolve the issues that you're seeing for little endian arc tests. It's mostly just updating the expected results, though one test needed improving for l/e arc. In the final test the layout used for bitfields within a struct on little endian arc just happened to result in a movb (move bits) not being generated when it could / should have been. I've added a new peephole2 case to catch this. Thanks, Andrew --- gcc/arc: New peephole2 and little endian arc test fixes Resolve some test failures introduced for little endian arc as a result of the recent arc/nps400 additions. There's a new peephole2 optimisation to merge together two zero_extracts in order that the movb instruction can be used. One of the test cases is extended so that the test does something meaningful in both big and little endian arc mode. Other tests have their expected results updated to reflect improvements in other areas of GCC. gcc/ChangeLog: * config/arc/arc.md (movb peephole2): New peephole2 to merge two zero_extract operations to allow a movb to occur. gcc/testsuite/ChangeLog: * gcc.target/arc/movb-1.c: Update little endian arc results. * gcc.target/arc/movb-2.c: Likewise. * gcc.target/arc/movb-5.c: Likewise. * gcc.target/arc/movh_cl-1.c: Extend test to cover little endian arc. --- gcc/ChangeLog | 5 +++++ gcc/config/arc/arc.md | 14 ++++++++++++++ gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gcc.target/arc/movb-1.c | 2 +- gcc/testsuite/gcc.target/arc/movb-2.c | 2 +- gcc/testsuite/gcc.target/arc/movb-5.c | 2 +- gcc/testsuite/gcc.target/arc/movh_cl-1.c | 11 +++++++++++ 7 files changed, 41 insertions(+), 3 deletions(-) diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index c61107f..0b92594 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -6144,6 +6144,20 @@ (zero_extract:SI (match_dup 1) (match_dup 5) (match_dup 7)))]) (match_dup 1)]) +(define_peephole2 + [(set (match_operand:SI 0 "register_operand" "") + (zero_extract:SI (match_dup 0) + (match_operand:SI 1 "const_int_operand" "") + (match_operand:SI 2 "const_int_operand" ""))) + (set (zero_extract:SI (match_operand:SI 3 "register_operand" "") + (match_dup 1) + (match_dup 2)) + (match_dup 0))] + "TARGET_NPS_BITOPS + && !reg_overlap_mentioned_p (operands[0], operands[3])" + [(set (zero_extract:SI (match_dup 3) (match_dup 1) (match_dup 2)) + (zero_extract:SI (match_dup 0) (match_dup 1) (match_dup 2)))]) + ;; include the arc-FPX instructions (include "fpx.md") diff --git a/gcc/testsuite/gcc.target/arc/movb-1.c b/gcc/testsuite/gcc.target/arc/movb-1.c index 65d4ba4..94d9f5f 100644 --- a/gcc/testsuite/gcc.target/arc/movb-1.c +++ b/gcc/testsuite/gcc.target/arc/movb-1.c @@ -10,4 +10,4 @@ f (void) bar.b = foo.b; } /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *5, *3, *8" { target arceb-*-* } } } */ -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *19, *21, *8" { target arc-*-* } } } */ +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *3, *5, *8" { target arc-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/arc/movb-2.c b/gcc/testsuite/gcc.target/arc/movb-2.c index 1ba9976..708f393 100644 --- a/gcc/testsuite/gcc.target/arc/movb-2.c +++ b/gcc/testsuite/gcc.target/arc/movb-2.c @@ -9,5 +9,5 @@ f (void) { bar.b = foo.b; } -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *23, *23, *9" { target arc-*-* } } } */ +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *7, *7, *9" { target arc-*-* } } } */ /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *0, *0, *9" { target arceb-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/arc/movb-5.c b/gcc/testsuite/gcc.target/arc/movb-5.c index 9dbe8a1..d285888 100644 --- a/gcc/testsuite/gcc.target/arc/movb-5.c +++ b/gcc/testsuite/gcc.target/arc/movb-5.c @@ -9,5 +9,5 @@ f (void) { bar.b = foo.b; } -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *23, *(23|7), *9" { target arc-*-* } } } */ +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *7, *7, *9" { target arc-*-* } } } */ /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+, *0, *0, *9" { target arceb-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/arc/movh_cl-1.c b/gcc/testsuite/gcc.target/arc/movh_cl-1.c index 220cd9d..c643481 100644 --- a/gcc/testsuite/gcc.target/arc/movh_cl-1.c +++ b/gcc/testsuite/gcc.target/arc/movh_cl-1.c @@ -10,6 +10,9 @@ struct thing { unsigned a : 1; unsigned b : 1; + unsigned c : 28; + unsigned d : 1; + unsigned e : 1; }; }; }; @@ -24,4 +27,12 @@ blah () func (xx.raw); } +void +woof () +{ + struct thing xx; + xx.d = xx.e = 1; + func (xx.raw); +} + /* { dg-final { scan-assembler "movh\.cl r\[0-9\]+,0xc0000000>>16" } } */