diff mbox

, PR target/70640, Fix thinkos in PowerPC IEEE 128-bit floating point emulation

Message ID 20160412191122.GA19415@ibm-tiger.the-meissners.org
State New
Headers show

Commit Message

Michael Meissner April 12, 2016, 7:11 p.m. UTC 
After I moved the patches for the 70381 to my internal branch for GCC 7.0
submissions, I noticed test float128-1.c was failing. I tracked it down to the
fact that the pre-gcc7 branch defaults to using LRA on by default instead of
reload.

I tracked this down to using a "=" constraint on an input argument. LRA deletes
the insns that setup the input argument, since it believed it was an output
only argument:

(define_insn "*ieee_128bit_vsx_neg<mode>2_internal"
  [(set (match_operand:IEEE128 0 "register_operand" "=wa")
	(neg:IEEE128 (match_operand:IEEE128 1 "register_operand" "wa")))
   (use (match_operand:V16QI 2 "register_operand" "=v"))]
  "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
  "xxlxor %x0,%x1,%x2"
  [(set_attr "type" "vecsimple")])

I have checked this by bootstrapping and doing a make check.  There were no
regressions. Is it ok to check into the trunk?

[gcc]
2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/70680
	* config/rs6000/rs6000.md (ieee_128bit_vsx_neg<mode>2_internal):
	Do not use "=" constraint on an input constraint.
	(ieee_128bit_vsx_abs<mode>2_internal): Likewise.
	(ieee_128bit_vsx_nabs<mode>2_internal): Likewise.
	(ieee_128bit_vsx_nabs<mode>2): Correct splitter so that it
	generates (neg (abs ...)) instead of (abs ...).

[gcc/testsuite]
2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/70680
	* gcc.target/powerpc/pr70640.c: New test.

Comments

David Edelsohn April 12, 2016, 7:18 p.m. UTC | #1 
On Tue, Apr 12, 2016 at 3:11 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> After I moved the patches for the 70381 to my internal branch for GCC 7.0
> submissions, I noticed test float128-1.c was failing. I tracked it down to the
> fact that the pre-gcc7 branch defaults to using LRA on by default instead of
> reload.
>
> I tracked this down to using a "=" constraint on an input argument. LRA deletes
> the insns that setup the input argument, since it believed it was an output
> only argument:
>
> (define_insn "*ieee_128bit_vsx_neg<mode>2_internal"
>   [(set (match_operand:IEEE128 0 "register_operand" "=wa")
>         (neg:IEEE128 (match_operand:IEEE128 1 "register_operand" "wa")))
>    (use (match_operand:V16QI 2 "register_operand" "=v"))]
>   "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
>   "xxlxor %x0,%x1,%x2"
>   [(set_attr "type" "vecsimple")])
>
> I have checked this by bootstrapping and doing a make check.  There were no
> regressions. Is it ok to check into the trunk?
>
> [gcc]
> 2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
>
>         PR target/70680
>         * config/rs6000/rs6000.md (ieee_128bit_vsx_neg<mode>2_internal):
>         Do not use "=" constraint on an input constraint.
>         (ieee_128bit_vsx_abs<mode>2_internal): Likewise.
>         (ieee_128bit_vsx_nabs<mode>2_internal): Likewise.
>         (ieee_128bit_vsx_nabs<mode>2): Correct splitter so that it
>         generates (neg (abs ...)) instead of (abs ...).
>
> [gcc/testsuite]
> 2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
>
>         PR target/70680
>         * gcc.target/powerpc/pr70640.c: New test.

Okay.

Thanks, David
diff mbox

Patch

Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md	(revision 234905)
+++ gcc/config/rs6000/rs6000.md	(working copy)
@@ -7261,7 +7261,7 @@  (define_insn_and_split "ieee_128bit_vsx_
 (define_insn "*ieee_128bit_vsx_neg<mode>2_internal"
   [(set (match_operand:IEEE128 0 "register_operand" "=wa")
 	(neg:IEEE128 (match_operand:IEEE128 1 "register_operand" "wa")))
-   (use (match_operand:V16QI 2 "register_operand" "=v"))]
+   (use (match_operand:V16QI 2 "register_operand" "v"))]
   "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
   "xxlxor %x0,%x1,%x2"
   [(set_attr "type" "vecsimple")])
@@ -7290,7 +7290,7 @@  (define_insn_and_split "ieee_128bit_vsx_
 (define_insn "*ieee_128bit_vsx_abs<mode>2_internal"
   [(set (match_operand:IEEE128 0 "register_operand" "=wa")
 	(abs:IEEE128 (match_operand:IEEE128 1 "register_operand" "wa")))
-   (use (match_operand:V16QI 2 "register_operand" "=v"))]
+   (use (match_operand:V16QI 2 "register_operand" "v"))]
   "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
   "xxlandc %x0,%x1,%x2"
   [(set_attr "type" "vecsimple")])
@@ -7306,7 +7306,7 @@  (define_insn_and_split "*ieee_128bit_vsx
   "#"
   "&& 1"
   [(parallel [(set (match_dup 0)
-		   (abs:IEEE128 (match_dup 1)))
+		   (neg:IEEE128 (abs:IEEE128 (match_dup 1))))
 	      (use (match_dup 2))])]
 {
   if (GET_CODE (operands[2]) == SCRATCH)
@@ -7323,7 +7323,7 @@  (define_insn "*ieee_128bit_vsx_nabs<mode
 	(neg:IEEE128
 	 (abs:IEEE128
 	  (match_operand:IEEE128 1 "register_operand" "wa"))))
-   (use (match_operand:V16QI 2 "register_operand" "=v"))]
+   (use (match_operand:V16QI 2 "register_operand" "v"))]
   "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
   "xxlor %x0,%x1,%x2"
   [(set_attr "type" "vecsimple")])
Index: gcc/testsuite/gcc.target/powerpc/pr70640.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr70640.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr70640.c	(working copy)
@@ -0,0 +1,11 @@ 
+/* { dg-do compile { target { powerpc*-*-linux* } } } */
+/* { dg-require-effective-target powerpc_float128_sw_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-O2 -mcpu=power8 -mfloat128" } */
+
+__float128 foo (__float128 a) { return -a; }
+
+/* { dg-final { scan-assembler "xxlorc" } } */
+/* { dg-final { scan-assembler "xxlxor" } } */
+/* { dg-final { scan-assembler "vslb"   } } */
+/* { dg-final { scan-assembler "vsldoi" } } */