From patchwork Wed Jan 27 15:34:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Enkovich X-Patchwork-Id: 574059 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D2A6B140774 for ; Thu, 28 Jan 2016 02:35:46 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=hnA79cth; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:mime-version:content-type; q=dns; s= default; b=fzqBE9vfz4018j21yAxuXBO5kwSdN26Ps3dwg3pyqKkDd6aQKRdVc f57ggI17qpQ5vOP+xM5EXVWozBffTDbMa45EMlahBBxHNePmMle9n+bbCCbSOSy/ VHYz9jQMM8oCiA/UBS2qFsSsrsBGpyqFf4zP3UKXA1jLntJe7ZWAgE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:mime-version:content-type; s= default; bh=VUcz+D66Q7TCIZbmWUlobhXv6lQ=; b=hnA79cthq/k3YzOv6Bnl kgdfCDaFt3XdOwMxnIHYd2kSeXJi3KUvSfBqSLtR+trKmV7oan7l7Ps4nBUowLsI x77SkgO8Lo1iRmDjwHjuayUoFxC18pgMwJVafexinLU5aF4ux3BDPSpv9p3Y7umR GHvUrkDwGm1qpJsQRiU01I0= Received: (qmail 73802 invoked by alias); 27 Jan 2016 15:35:33 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 73762 invoked by uid 89); 27 Jan 2016 15:35:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-ig0-f182.google.com Received: from mail-ig0-f182.google.com (HELO mail-ig0-f182.google.com) (209.85.213.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 27 Jan 2016 15:35:27 +0000 Received: by mail-ig0-f182.google.com with SMTP id ik10so83271048igb.1 for ; Wed, 27 Jan 2016 07:35:26 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:subject:message-id:mime-version :content-type:content-disposition:user-agent; bh=GoXk4HraRSpPb6i6Zemoo9UKxnj0AG+kvO3e4CiiScg=; b=Evys4Nwrk6Y0uUrdsRS0x4Mvz26pYqVS1jvkQt3nYuH1qJomy6jYPW+vSEaz1DSa0m Q1rh3hNlHAenXK0sNWTZmtaaVi8NesrnkysGeCkT/6N62a9JByaT+jlf4zivlfVya7BV 4X3ok3oQ8oDW8OhtMieTih8gXFoli0vChbGgAJrmgxme2HgQVWI3UAjB9r+LYlCNIun6 bFlvr5iWi23w2XwrlW/2RHdF6kf+rygvOihXJjPSoC/c0pRK/u2yhh/t1bjOGujIbcpf N2X7xSc4ez62DELDLctACH4/Ma+w/Y6qP79nIYHeVGfwgwlS6jntKwY7tMsRR7ZcDZOz XWcg== X-Gm-Message-State: AG10YOR++rnLaa2aC/RK9ast3Bx/miM/fca+icD7Jbh75gRvqATsRUQok8v9N+TEXdBY7A== X-Received: by 10.50.136.227 with SMTP id qd3mr30171518igb.38.1453908925133; Wed, 27 Jan 2016 07:35:25 -0800 (PST) Received: from msticlxl57.ims.intel.com (irdmzpr01-ext.ir.intel.com. [192.198.151.36]) by smtp.gmail.com with ESMTPSA id l10sm3303928igx.18.2016.01.27.07.35.23 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 27 Jan 2016 07:35:24 -0800 (PST) Date: Wed, 27 Jan 2016 18:34:41 +0300 From: Ilya Enkovich To: gcc-patches@gcc.gnu.org Subject: [PATCH, PR target/69454] Disable TARGET_STV when stack is not properly aligned Message-ID: <20160127153441.GA16081@msticlxl57.ims.intel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes Hi, Currently STV pass may require a stack realignment if any transformation occurs to enable SSE registers spill/fill. It appears it's invalid to increase stack alignment requirements at this point. Thus we have to either assume we need stack to be aligned if are going to run STV pass or disable STV if stack is not properly aligned. I suppose we shouldn't ignore explicitly requested stack alignment not beeing sure we really optimize anything (and STV is not an optimization frequiently applied). So I think we may disable TARGET_STV for such cases as Jakub suggested. This patch was bootstrapped and regtested on x86_64-pc-linux-gnu. OK for trunk? Thanks, Ilya --- gcc/ 2016-01-27 Jakub Jelinek Ilya Enkovich PR target/69454 * config/i386/i386.c (convert_scalars_to_vector): Remove stack alignment fixes. (ix86_option_override_internal): Disable TARGET_STV if stack is not properly aligned. gcc/testsuite/ 2016-01-27 Ilya Enkovich PR target/69454 * gcc.target/i386/pr69454-1.c: New test. * gcc.target/i386/pr69454-2.c: New test. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 34b57a4..9fb8db8 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3588,16 +3588,6 @@ convert_scalars_to_vector () bitmap_obstack_release (NULL); df_process_deferred_rescans (); - /* Conversion means we may have 128bit register spills/fills - which require aligned stack. */ - if (converted_insns) - { - if (crtl->stack_alignment_needed < 128) - crtl->stack_alignment_needed = 128; - if (crtl->stack_alignment_estimated < 128) - crtl->stack_alignment_estimated = 128; - } - return 0; } @@ -5453,6 +5443,11 @@ ix86_option_override_internal (bool main_args_p, opts->x_target_flags |= MASK_VZEROUPPER; if (!(opts_set->x_target_flags & MASK_STV)) opts->x_target_flags |= MASK_STV; + /* Disable STV if -mpreferred-stack-boundary={2,3} - the needed + stack realignment will be extra cost the pass doesn't take into + account and the pass can't realign the stack. */ + if (ix86_preferred_stack_boundary < 64) + opts->x_target_flags &= ~MASK_STV; if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL] && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD)) opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD; diff --git a/gcc/testsuite/gcc.target/i386/pr69454-1.c b/gcc/testsuite/gcc.target/i386/pr69454-1.c new file mode 100644 index 0000000..12ecfd3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69454-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -msse2 -mno-accumulate-outgoing-args -mpreferred-stack-boundary=2" } */ + +typedef struct { long long w64[2]; } V128; +extern V128* fn2(void); +long long a; +V128 b; +void fn1() { + V128 *c = fn2(); + c->w64[0] = a ^ b.w64[0]; +} diff --git a/gcc/testsuite/gcc.target/i386/pr69454-2.c b/gcc/testsuite/gcc.target/i386/pr69454-2.c new file mode 100644 index 0000000..28bab93 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69454-2.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -mpreferred-stack-boundary=2" } */ + +extern void fn2 (); +long long a, b; + +void fn1 () +{ + long long c = a; + a = b ^ a; + fn2 (); + a = c; +}