From patchwork Fri Sep 25 00:19:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 522608 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 6368C140281 for ; Fri, 25 Sep 2015 10:19:30 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=DOYbckjm; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:reply-to:mime-version:content-type; q=dns; s=default; b=FstRuLCWpcvrLQTPdXJdAL6YA0wzqJ9qJ3mxTwCnVUQ SLIiC/ejAat2hhrquW8t6B+bgakkl41m+y7TULE5HeebOvsAleGYkGEYXqNVoG+M Klrg3i6QZXxCaM/3isdgY13M77fsZkGhbHE4VuMd2+K/RKr6bw0QNId4kvhLMgts = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:reply-to:mime-version:content-type; s=default; bh=IXW2r3I4T67aG5S/wIAeCnsp7Fg=; b=DOYbckjmXo+ZGXxHI 2M+IZFP4oOE05uGkJplFRxPy/cqyxOk3RucrWcwbF138jf0ewY5/r3YEeoRh4HNZ 0reUiRLeaXBbLdpfbCsLPiTqKICVokDHrnrWlHMdH4nDpmLiYmse5jiBXm8Al7iV n9lwdIutieZS3q5qGOj9gDDdbQ= Received: (qmail 41749 invoked by alias); 25 Sep 2015 00:19:22 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 41740 invoked by uid 89); 25 Sep 2015 00:19:21 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=AWL, BAYES_50, KAM_LAZY_DOMAIN_SECURITY, NO_DNS_FOR_FROM, RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: mga01.intel.com Received: from mga01.intel.com (HELO mga01.intel.com) (192.55.52.88) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 25 Sep 2015 00:19:19 +0000 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 24 Sep 2015 17:19:18 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([172.25.70.52]) by fmsmga001.fm.intel.com with ESMTP; 24 Sep 2015 17:19:17 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 1000) id 02D2CC421E; Thu, 24 Sep 2015 17:19:18 -0700 (PDT) Date: Thu, 24 Sep 2015 17:19:17 -0700 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Subject: [committed, PATCH] Change IA MCU processor from iamcu to lakemount Message-ID: <20150925001917.GA5094@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) The first IA MCU processor will be Lakemount. This patch changes IA MCU processor name from iamcu to lakemount. Tested on Linux/x86-64 with -m32. Checked into trunk. H.J. --- gcc/ * config.gcc (x86_archs): Replace iamcu with lakemount. (with_cpu): Likewise. (with_arch): Likewise. * doc/invoke.texi: Likewise. * config/i386/i386-c.c (ix86_target_macros_internal): Replace PROCESSOR_IAMCU with PROCESSOR_LAKEMOUNT. Replace __tune_iamcu__ with __tune_lakemount__. * config/i386/i386.c (iamcu_cost): Renamed to ... (lakemount_cost): This. (m_IAMCU): Renamed to ... (m_LAKEMOUNT): This. (initial_ix86_arch_features): Replace m_IAMCU with m_LAKEMOUNT. (processor_target_table): Replace "iamcu" with "lakemount". (processor_alias_table): Likewise. (ix86_issue_rate): Replace PROCESSOR_IAMCU with PROCESSOR_LAKEMOUNT. (ix86_adjust_cost): Likewise. (ia32_multipass_dfa_lookahead): Likewise. * config/i386/i386.h (processor_type): Likewise. * config/i386/x86-tune.def: Replace m_IAMCU with m_LAKEMOUNT. gcc/testsuite/ * gcc.target/i386/pr66749.c (dg-options): Replace -mtune=iamcu with -mtune=lakemount. * gcc.target/i386/pr66821.c (dg-options): Likewise. * gcc.target/i386/pr67329.c (dg-options): Likewise. --- gcc/config.gcc | 6 +++--- gcc/config/i386/i386-c.c | 6 +++--- gcc/config/i386/i386.c | 16 ++++++++-------- gcc/config/i386/i386.h | 2 +- gcc/config/i386/x86-tune.def | 26 +++++++++++++------------- gcc/doc/invoke.texi | 4 ++-- gcc/testsuite/gcc.target/i386/pr66749.c | 2 +- gcc/testsuite/gcc.target/i386/pr66821.c | 2 +- gcc/testsuite/gcc.target/i386/pr67329.c | 2 +- 9 files changed, 33 insertions(+), 33 deletions(-) diff --git a/gcc/config.gcc b/gcc/config.gcc index f060e2f..41814b8 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -587,7 +587,7 @@ tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4" x86_archs="athlon athlon-4 athlon-fx athlon-mp athlon-tbird \ athlon-xp k6 k6-2 k6-3 geode c3 c3-2 winchip-c6 winchip2 i386 i486 \ i586 i686 pentium pentium-m pentium-mmx pentium2 pentium3 pentium3m \ -pentium4 pentium4m pentiumpro prescott iamcu" +pentium4 pentium4m pentiumpro prescott lakemount" # 64-bit x86 processors supported by --with-arch=. Each processor # MUST be separated by exactly one space. @@ -3287,7 +3287,7 @@ esac if test x$with_cpu = x ; then case ${target} in i[34567]86-*-elfiamcu) - with_cpu=iamcu + with_cpu=lakemount ;; i[34567]86-*-*|x86_64-*-*) with_cpu=$cpu @@ -3385,7 +3385,7 @@ if test x$with_arch = x ; then # and TARGET_SUBTARGET64_ISA_DEFAULT in config/i386/darwin.h. ;; i[34567]86-*-elfiamcu) - with_arch=iamcu + with_arch=lakemount ;; i[34567]86-*-*) # --with-fpmath sets the default ISA to SSE2, which is the same diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c index 5e583ae..86f2426 100644 --- a/gcc/config/i386/i386-c.c +++ b/gcc/config/i386/i386-c.c @@ -63,7 +63,7 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__i486"); def_or_undef (parse_in, "__i486__"); break; - case PROCESSOR_IAMCU: + case PROCESSOR_LAKEMOUNT: /* Intel MCU is based on Intel Pentium CPU. */ case PROCESSOR_PENTIUM: def_or_undef (parse_in, "__i586"); @@ -293,8 +293,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, case PROCESSOR_SKYLAKE_AVX512: def_or_undef (parse_in, "__tune_skylake_avx512__"); break; - case PROCESSOR_IAMCU: - def_or_undef (parse_in, "__tune_iamcu__"); + case PROCESSOR_LAKEMOUNT: + def_or_undef (parse_in, "__tune_lakemount__"); break; case PROCESSOR_INTEL: case PROCESSOR_GENERIC: diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 8a26f68..193cabf 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -417,7 +417,7 @@ struct processor_costs pentium_cost = { }; static const -struct processor_costs iamcu_cost = { +struct processor_costs lakemount_cost = { COSTS_N_INSNS (1), /* cost of an add instruction */ COSTS_N_INSNS (1) + 1, /* cost of a lea instruction */ COSTS_N_INSNS (1), /* variable shift costs */ @@ -2085,7 +2085,7 @@ const struct processor_costs *ix86_cost = &pentium_cost; #define m_386 (1<