From patchwork Wed Sep 9 22:02:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 516050 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D3035140281 for ; Thu, 10 Sep 2015 08:02:40 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=p3MDl8oG; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:reply-to:mime-version:content-type; q=dns; s=default; b=pLQZ9gzpLSkRFNaQq7XBj/NWz53i6V3fuFECjAmhzRr lfz3TGE3CzPWrySdAkBSi/io8bZvW9a74UYtlgiA6+2uWKK4tOIKeOEYKpbjJF0h weqd8kW+L8bFzfviaS0IhDhZtGuY0E48H0WA+CDL06T9WZrsJpM2DqUicZaTpDHc = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:reply-to:mime-version:content-type; s=default; bh=Yaggw2sANNgeHwv+73hhzlCf8OY=; b=p3MDl8oGpOmow5Okc ZhW0pV9Fm19Si58ytVl6e5RsCGnU8Jms64PBy6+eYvuZtkFEPw84NM/tKrU2U2C5 0a+ClAi4h39G1EOXb/FaFlfq1iGkultE90gtmDleC9lnZkftFnb87eB/dUK6lxm7 wE8PUvsa8J82E95k70UIon0L9Q= Received: (qmail 121201 invoked by alias); 9 Sep 2015 22:02:33 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 121192 invoked by uid 89); 9 Sep 2015 22:02:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL, BAYES_00, KAM_LAZY_DOMAIN_SECURITY, KAM_STOCKGEN, NO_DNS_FOR_FROM, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: mga14.intel.com Received: from mga14.intel.com (HELO mga14.intel.com) (192.55.52.115) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 09 Sep 2015 22:02:31 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 09 Sep 2015 15:02:04 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([172.25.70.52]) by orsmga001.jf.intel.com with ESMTP; 09 Sep 2015 15:02:03 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 1000) id F1867C38B1; Wed, 9 Sep 2015 15:02:02 -0700 (PDT) Date: Wed, 9 Sep 2015 15:02:02 -0700 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Subject: [PATCH] PR target/67215: -fno-plt needs improvements for x86 Message-ID: <20150909220202.GA8744@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) prepare_call_address in calls.c is the wrong place to handle -fno-plt. We shoudn't force function address into register and hope that load function address via GOT and indirect call via register will be folded into indirect call via GOT, which doesn't always happen. Also non-PIC case can only be handled in backend. Instead, backend should expand external function call into indirect call via GOT for -fno-plt. This patch reverts -fno-plt in prepare_call_address and handles it in ix86_expand_call. Other backends may need similar changes to support -fno-plt. Alternately, we can introduce a target hook to indicate whether an external function should be called via register for -fno-plt so that i386 backend can disable it in prepare_call_address. gcc/ PR target/67215 * calls.c (prepare_call_address): Don't handle -fno-plt here. * config/i386/i386.c (ix86_expand_call): Generate indirect call via GOT for -fno-plt. Support indirect call via GOT for x32. * config/i386/predicates.md (sibcall_memory_operand): Allow GOT memory operand. gcc/testsuite/ PR target/67215 * gcc.target/i386/pr67215-1.c: New test. * gcc.target/i386/pr67215-2.c: Likewise. * gcc.target/i386/pr67215-3.c: Likewise. --- gcc/calls.c | 12 ------ gcc/config/i386/i386.c | 71 ++++++++++++++++++++++++------- gcc/config/i386/predicates.md | 7 ++- gcc/testsuite/gcc.target/i386/pr67215-1.c | 20 +++++++++ gcc/testsuite/gcc.target/i386/pr67215-2.c | 20 +++++++++ gcc/testsuite/gcc.target/i386/pr67215-3.c | 13 ++++++ 6 files changed, 114 insertions(+), 29 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr67215-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr67215-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr67215-3.c diff --git a/gcc/calls.c b/gcc/calls.c index 026cb53..22c65cd 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -203,18 +203,6 @@ prepare_call_address (tree fndecl_or_type, rtx funexp, rtx static_chain_value, && targetm.small_register_classes_for_mode_p (FUNCTION_MODE)) ? force_not_mem (memory_address (FUNCTION_MODE, funexp)) : memory_address (FUNCTION_MODE, funexp)); - else if (flag_pic - && fndecl_or_type - && TREE_CODE (fndecl_or_type) == FUNCTION_DECL - && (!flag_plt - || lookup_attribute ("noplt", DECL_ATTRIBUTES (fndecl_or_type))) - && !targetm.binds_local_p (fndecl_or_type)) - { - /* This is done only for PIC code. There is no easy interface to force the - function address into GOT for non-PIC case. non-PIC case needs to be - handled specially by the backend. */ - funexp = force_reg (Pmode, funexp); - } else if (! sibcallp) { if (!NO_FUNCTION_CSE && optimize && ! flag_no_function_cse) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index d78f4e7..b9299d4 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -25649,21 +25649,54 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, /* Static functions and indirect calls don't need the pic register. Also, check if PLT was explicitly avoided via no-plt or "noplt" attribute, making it an indirect call. */ + rtx addr = XEXP (fnaddr, 0); if (flag_pic - && (!TARGET_64BIT - || (ix86_cmodel == CM_LARGE_PIC - && DEFAULT_ABI != MS_ABI)) - && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF - && !SYMBOL_REF_LOCAL_P (XEXP (fnaddr, 0)) - && flag_plt - && (SYMBOL_REF_DECL ((XEXP (fnaddr, 0))) == NULL_TREE - || !lookup_attribute ("noplt", - DECL_ATTRIBUTES (SYMBOL_REF_DECL (XEXP (fnaddr, 0)))))) + && GET_CODE (addr) == SYMBOL_REF + && !SYMBOL_REF_LOCAL_P (addr)) { - use_reg (&use, gen_rtx_REG (Pmode, REAL_PIC_OFFSET_TABLE_REGNUM)); - if (ix86_use_pseudo_pic_reg ()) - emit_move_insn (gen_rtx_REG (Pmode, REAL_PIC_OFFSET_TABLE_REGNUM), - pic_offset_table_rtx); + if (flag_plt + && (SYMBOL_REF_DECL (addr) == NULL_TREE + || !lookup_attribute ("noplt", + DECL_ATTRIBUTES (SYMBOL_REF_DECL (addr))))) + { + if (!TARGET_64BIT + || (ix86_cmodel == CM_LARGE_PIC + && DEFAULT_ABI != MS_ABI)) + { + use_reg (&use, gen_rtx_REG (Pmode, + REAL_PIC_OFFSET_TABLE_REGNUM)); + if (ix86_use_pseudo_pic_reg ()) + emit_move_insn (gen_rtx_REG (Pmode, + REAL_PIC_OFFSET_TABLE_REGNUM), + pic_offset_table_rtx); + } + } + else if (!TARGET_PECOFF && !TARGET_MACHO) + { + if (TARGET_64BIT) + { + fnaddr = gen_rtx_UNSPEC (Pmode, + gen_rtvec (1, addr), + UNSPEC_GOTPCREL); + fnaddr = gen_rtx_CONST (Pmode, fnaddr); + } + else + { + fnaddr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), + UNSPEC_GOT); + fnaddr = gen_rtx_CONST (Pmode, fnaddr); + fnaddr = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, + fnaddr); + } + fnaddr = gen_const_mem (Pmode, fnaddr); + /* Pmode may not be the same as word_mode for x32, which + doesn't support indirect branch via 32-bit memory slot. + Since x32 GOT slot is 64 bit with zero upper 32 bits, + indirect branch via x32 GOT slot is OK. */ + if (GET_MODE (fnaddr) != word_mode) + fnaddr = gen_rtx_ZERO_EXTEND (word_mode, fnaddr); + fnaddr = gen_rtx_MEM (QImode, fnaddr); + } } } @@ -25685,9 +25718,15 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode)) fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0))); - else if (sibcall - ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode) - : !call_insn_operand (XEXP (fnaddr, 0), word_mode)) + /* Since x32 GOT slot is 64 bit with zero upper 32 bits, indirect + branch via x32 GOT slot is OK. */ + else if (!(TARGET_X32 + && MEM_P (fnaddr) + && GET_CODE (XEXP (fnaddr, 0)) == ZERO_EXTEND + && GOT_memory_operand (XEXP (XEXP (fnaddr, 0), 0), Pmode)) + && (sibcall + ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode) + : !call_insn_operand (XEXP (fnaddr, 0), word_mode))) { fnaddr = convert_to_mode (word_mode, XEXP (fnaddr, 0), 1); fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (word_mode, fnaddr)); diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index bc76a5b..822d834 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -593,7 +593,12 @@ ;; Return true if OP is a memory operands that can be used in sibcalls. (define_predicate "sibcall_memory_operand" (and (match_operand 0 "memory_operand") - (match_test "CONSTANT_P (XEXP (op, 0))"))) + (match_test "CONSTANT_P (XEXP (op, 0)) + || (GET_CODE (XEXP (op, 0)) == PLUS + && REG_P (XEXP (XEXP (op, 0), 0)) + && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST + && GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 0)) == UNSPEC + && XINT (XEXP (XEXP (XEXP (op, 0), 1), 0), 1) == UNSPEC_GOT)"))) ;; Test for a valid operand for a call instruction. ;; Allow constant call address operands in Pmode only. diff --git a/gcc/testsuite/gcc.target/i386/pr67215-1.c b/gcc/testsuite/gcc.target/i386/pr67215-1.c new file mode 100644 index 0000000..fd37f8e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt" } */ + +extern char* bar (int); +extern char* arr[32]; + +void +foo (void) +{ + int i; + + for (i = 0; i < 32; i++) + arr[i] = bar (128); +} + +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "mov(l|q)\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "call\[ \t\]*.bar@PLT" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67215-2.c b/gcc/testsuite/gcc.target/i386/pr67215-2.c new file mode 100644 index 0000000..ebf2919 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-2.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic" } */ + +extern char* bar (int) __attribute__ ((noplt)); +extern char* arr[32]; + +void +foo (void) +{ + int i; + + for (i = 0; i < 32; i++) + arr[i] = bar (128); +} + +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "mov(l|q)\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "call\[ \t\]*.bar@PLT" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67215-3.c b/gcc/testsuite/gcc.target/i386/pr67215-3.c new file mode 100644 index 0000000..eb6bb39 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-3.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt -fdump-rtl-expand" } */ + +extern int bar (void); + +int +foo (void) +{ + return bar (); +} + +/* { dg-final { scan-rtl-dump "\\(call \\(mem:QI \\(mem/u/c:" "expand" { target { ! x32 } } } } */ +/* { dg-final { scan-rtl-dump "\\(call \\(mem:QI \\(zero_extend:DI \\(mem/u/c:" "expand" { target x32 } } } */