From patchwork Thu Jul 9 13:10:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 493408 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 22CF91402B1 for ; Thu, 9 Jul 2015 23:11:01 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=twYZ+Yk+; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; q=dns; s=default; b=wRn1iU7/Fjg4sBNIp1v+rrQSuRlEy K/NkSba+C9pwawKCGJ+wAXEsIfJMxX2P1NmXWhi02O7wv84w7gTuaQ4LLDh++ia5 BUqwpKnYhDOBl3WqU4LGyIOMKtLxxgJI01lNQGv6JeT/iBs6/a7zIQqF53XHWSdx l/b1v0RP+7Qjws= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; s=default; bh=g8HkYUwn51fgwb8AAfpxlRBFdr8=; b=twY Z+Yk+h3u1nyf5lLbkQEkG80ew9cTzuarpniSKXkbYJgDwz34ulI7s2DDfzTcvJS2 Og89+oI4LtSAVc1SFvO2TjUhv9FqQi9aOzI3/7OdCqvONvIWeLP4n/qPHHglgp/V JZEQCEsfjtanLfveOB3+niNkiF1ih8wv6xrpx0uA= Received: (qmail 49645 invoked by alias); 9 Jul 2015 13:10:56 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 49633 invoked by uid 89); 9 Jul 2015 13:10:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, KAM_LAZY_DOMAIN_SECURITY, NO_DNS_FOR_FROM, RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: mga02.intel.com Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 09 Jul 2015 13:10:55 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 09 Jul 2015 06:10:53 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([172.25.70.52]) by orsmga001.jf.intel.com with ESMTP; 09 Jul 2015 06:10:53 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 1000) id 734E8C3D4D; Thu, 9 Jul 2015 06:10:52 -0700 (PDT) Date: Thu, 9 Jul 2015 06:10:52 -0700 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak , Richard Henderson Subject: [PATCH] PR target/66813: gcc.target/i386/asm-flag-5.c failed with -march=pentium Message-ID: <20150709131052.GA7254@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) gen_rtx_ZERO_EXTEND isn't suitable in ix86_md_asm_adjust since ZERO_EXTEND may be expaned. We should call gen_zero_extendqiXi2 instead. OK for trunk? H.J. --- gcc/ PR target/66813 * config/i386/i386.c (ix86_md_asm_adjust): Replace gen_rtx_ZERO_EXTEND with gen_zero_extendqiXi2. gcc/testsuite/ PR target/66813 * gcc.target/i386/asm-flag-6.c: New test. --- gcc/config/i386/i386.c | 16 +++++++++++++++- gcc/testsuite/gcc.target/i386/asm-flag-6.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/i386/asm-flag-6.c diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 85e59a8..485638d 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -45845,7 +45845,21 @@ ix86_md_asm_adjust (vec &outputs, vec &/*inputs*/, { rtx destqi = gen_reg_rtx (QImode); emit_insn (gen_rtx_SET (destqi, x)); - x = gen_rtx_ZERO_EXTEND (dest_mode, destqi); + x = gen_reg_rtx (dest_mode); + switch (dest_mode) + { + case HImode: + emit_insn (gen_zero_extendqihi2 (x, destqi)); + break; + case SImode: + emit_insn (gen_zero_extendqisi2 (x, destqi)); + break; + case DImode: + emit_insn (gen_zero_extendqidi2 (x, destqi)); + break; + default: + gcc_unreachable (); + } } emit_insn (gen_rtx_SET (dest, x)); } diff --git a/gcc/testsuite/gcc.target/i386/asm-flag-6.c b/gcc/testsuite/gcc.target/i386/asm-flag-6.c new file mode 100644 index 0000000..2c43227 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/asm-flag-6.c @@ -0,0 +1,29 @@ +/* Test error conditions of asm flag outputs. */ +/* { dg-do compile } */ +/* { dg-options "-mtune-ctrl=zero_extend_with_and " } */ + +void f_B(void) { _Bool x; asm("" : "=@ccc"(x)); } +void f_c(void) { char x; asm("" : "=@ccc"(x)); } +void f_s(void) { short x; asm("" : "=@ccc"(x)); } +void f_i(void) { int x; asm("" : "=@ccc"(x)); } +void f_l(void) { long x; asm("" : "=@ccc"(x)); } + +void f_f(void) +{ + float x; + asm("" : "=@ccc"(x)); /* { dg-error invalid type } */ +} + +void f_d(void) +{ + double x; + asm("" : "=@ccc"(x)); /* { dg-error invalid type } */ +} + +struct S { int x[3]; }; + +void f_S(void) +{ + struct S x; + asm("" : "=@ccc"(x)); /* { dg-error invalid type } */ +}