From patchwork Fri Jun 12 08:52:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Krebbel X-Patchwork-Id: 483423 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id BE9B1140283 for ; Fri, 12 Jun 2015 18:53:11 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=jYq/CQ34; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; q=dns; s=default; b=ZbT1YWZNhhPUMMApC 1RHiBxPCG9g8sqhb5i7ror/lO8WpRm93bL5Xf7UeSgp94Rwt62naU6bVANVzOyQX GLYd48yuSYEPZd1Oil1QmRLOpjH3m3DM0sJdJ/ErgmEWPrjId5W0XRw8t6tnnfKn 9Tk6j/M8I+Z9peJFYP5nu+TXIc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; s=default; bh=zFN1zOI5fYGVXE0iUMCMM28 IJBU=; b=jYq/CQ34NV2w4+OeGQmFrCQz1ozIUuN81fHJXmJ9o+/Dl2sIFNCfb6Y w6yios5A2Xqap//6pcbStyFaoROlw2n8lkhou8aEUpCWH7H6kozIzO1xVVVGd5qP gh7/+Wg9GTSkY40Qx6hLMOMtDxLmTiVuTou0ANs8s3PhBS+B7U7g= Received: (qmail 68238 invoked by alias); 12 Jun 2015 08:53:04 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 68222 invoked by uid 89); 12 Jun 2015 08:53:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.2 required=5.0 tests=AWL, BAYES_50, KAM_LAZY_DOMAIN_SECURITY, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: e06smtp13.uk.ibm.com Received: from e06smtp13.uk.ibm.com (HELO e06smtp13.uk.ibm.com) (195.75.94.109) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (CAMELLIA256-SHA encrypted) ESMTPS; Fri, 12 Jun 2015 08:53:03 +0000 Received: from /spool/local by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 12 Jun 2015 09:52:58 +0100 Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by d06dlp03.portsmouth.uk.ibm.com (Postfix) with ESMTP id 3EF5B1B08067 for ; Fri, 12 Jun 2015 09:53:57 +0100 (BST) Received: from d06av10.portsmouth.uk.ibm.com (d06av10.portsmouth.uk.ibm.com [9.149.37.251]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t5C8qwD025559200 for ; Fri, 12 Jun 2015 08:52:58 GMT Received: from d06av10.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av10.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t5C8qwaU010760 for ; Fri, 12 Jun 2015 02:52:58 -0600 Received: from bart (icon-9-164-139-120.megacenter.de.ibm.com [9.164.139.120]) by d06av10.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with SMTP id t5C8qv97010619; Fri, 12 Jun 2015 02:52:57 -0600 Received: by bart (sSMTP sendmail emulation); Fri, 12 Jun 2015 10:52:56 +0200 Date: Fri, 12 Jun 2015 10:52:56 +0200 From: Andreas Krebbel To: Jakub Jelinek Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] PR33661 Fix problem with register asm in templates Message-ID: <20150612085256.GA29958@maggie> References: <20150611134948.GA14778@maggie> <20150611140512.GA10247@tucnak.redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20150611140512.GA10247@tucnak.redhat.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15061208-0013-0000-0000-00000456A800 X-IsSubscribed: yes Yes that's better. I've adjusted the testcase as you proposed and have tested it on x86_64, ppc, and s390x with -m32(-m31) and -m64. Bye, -Andreas- gcc/cp/ 2015-06-12 Andreas Krebbel PR c++/33661 * decl.c (cp_finish_decl): Set assembler name for register asm constructs. * pt.c (tsubst_decl): Do not zero out the assembler name for register asm constructs. gcc/testsuite/ 2015-06-12 Andreas Krebbel PR c++/33661 * g++.dg/pr33661.C: New test. diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c index a8cb358..b1eb33d 100644 --- a/gcc/cp/decl.c +++ b/gcc/cp/decl.c @@ -6536,6 +6536,13 @@ cp_finish_decl (tree decl, tree init, bool init_const_expr_p, if (init) DECL_INITIAL (decl) = init; + + /* Set the DECL_ASSEMBLER_NAME for the object. */ + if (asmspec && VAR_P (decl) && DECL_REGISTER (decl)) + { + set_user_assembler_name (decl, asmspec); + DECL_HARD_REGISTER (decl) = 1; + } return; } diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c index a0c5d7c..74ec5dd 100644 --- a/gcc/cp/pt.c +++ b/gcc/cp/pt.c @@ -11384,7 +11384,8 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) cp_apply_type_quals_to_decl (cp_type_quals (type), r); DECL_CONTEXT (r) = ctx; /* Clear out the mangled name and RTL for the instantiation. */ - SET_DECL_ASSEMBLER_NAME (r, NULL_TREE); + if (!VAR_P (r) || !DECL_HARD_REGISTER (r)) + SET_DECL_ASSEMBLER_NAME (r, NULL_TREE); if (CODE_CONTAINS_STRUCT (TREE_CODE (t), TS_DECL_WRTL)) SET_DECL_RTL (r, NULL); /* The initializer must not be expanded until it is required; diff --git a/gcc/testsuite/g++.dg/pr33661.C b/gcc/testsuite/g++.dg/pr33661.C new file mode 100644 index 0000000..2df963f --- /dev/null +++ b/gcc/testsuite/g++.dg/pr33661.C @@ -0,0 +1,31 @@ +/* PR c++/33661 */ + +/* { dg-do compile } */ +/* { dg-options "-O1" } */ +/* { dg-final { scan-assembler "reg: %r8" { target { { x86_64*-*-* i?86-*-* } && lp64 } } } } */ +/* { dg-final { scan-assembler "reg: %ecx" { target { { x86_64*-*-* i?86-*-* } && ia32 } } } } */ +/* { dg-final { scan-assembler "reg: 8" { target { powerpc*-*-* } } } } */ +/* { dg-final { scan-assembler "reg: %r8" { target { s390*-*-* } } } } */ + +typedef unsigned long long int uint64_t; + +template < typename T > static inline void +bar (T c) +{ + int a; +#if defined(__x86_64__) || defined(__PPC__) || defined(__s390__) + register unsigned long b __asm__ ("r8") = (unsigned long)&a; + __asm__ volatile ("reg: %0" : : "r" (b)); +#elif defined(__i386__) + register unsigned long b __asm__ ("ecx") = (unsigned long)&a; + __asm__ volatile ("reg: %0" : : "r" (b)); +#else + unsigned long b = (unsigned long)&a; +#endif +} + +void +foo (uint64_t c) +{ + bar (c); +}