===================================================================
@@ -193,4 +193,5 @@ RS6000_CPU ("power7", PROCESSOR_POWER7,
RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
===================================================================
@@ -3211,6 +3211,10 @@ rs6000_option_override_internal (bool gl
= ((global_init_p || target_option_default_node == NULL)
? NULL : TREE_TARGET_OPTION (target_option_default_node));
+ /* Print defaults. */
+ if ((TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) && global_init_p)
+ rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT);
+
/* Remember the explicit arguments. */
if (global_init_p)
rs6000_isa_flags_explicit = global_options_set.x_rs6000_isa_flags;
@@ -3287,7 +3291,13 @@ rs6000_option_override_internal (bool gl
}
else
{
- const char *default_cpu = (TARGET_POWERPC64 ? "powerpc64" : "powerpc");
+ /* PowerPC 64-bit LE requires at least ISA 2.07. */
+ const char *default_cpu = ((!TARGET_POWERPC64)
+ ? "powerpc"
+ : ((BYTES_BIG_ENDIAN)
+ ? "powerpc64"
+ : "powerpc64le"));
+
rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
have_cpu = false;
}
@@ -3306,15 +3316,18 @@ rs6000_option_override_internal (bool gl
& set_masks);
}
else
- rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
- & ~rs6000_isa_flags_explicit);
-
- /* If no -mcpu=<xxx>, inherit any default options that were cleared via
- POWERPC_MASKS. Originally, TARGET_DEFAULT was used to initialize
- target_flags via the TARGET_DEFAULT_TARGET_FLAGS hook. When we switched
- to using rs6000_isa_flags, we need to do the initialization here. */
- if (!have_cpu)
- rs6000_isa_flags |= (TARGET_DEFAULT & ~rs6000_isa_flags_explicit);
+ {
+ /* If no -mcpu=<xxx>, inherit any default options that were cleared via
+ POWERPC_MASKS. Originally, TARGET_DEFAULT was used to initialize
+ target_flags via the TARGET_DEFAULT_TARGET_FLAGS hook. When we switched
+ to using rs6000_isa_flags, we need to do the initialization here.
+
+ If there is a TARGET_DEFAULT, use that. Otherwise fall back to using
+ -mcpu=powerpc, -mcpu=powerpc64, or -mcpu=powerpc64le defaults. */
+ HOST_WIDE_INT flags = ((TARGET_DEFAULT) ? TARGET_DEFAULT
+ : processor_target_table[cpu_index].target_enable);
+ rs6000_isa_flags |= (flags & ~rs6000_isa_flags_explicit);
+ }
if (rs6000_tune_index >= 0)
tune_index = rs6000_tune_index;
@@ -4214,12 +4227,8 @@ rs6000_option_override_internal (bool gl
target_flags. */
rs6000_builtin_mask = rs6000_builtin_mask_calculate ();
if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
- {
- fprintf (stderr,
- "new builtin mask = " HOST_WIDE_INT_PRINT_HEX ", ",
- rs6000_builtin_mask);
- rs6000_print_builtin_options (stderr, 0, NULL, rs6000_builtin_mask);
- }
+ rs6000_print_builtin_options (stderr, 0, "builtin mask",
+ rs6000_builtin_mask);
/* Initialize all of the registers. */
rs6000_init_hard_regno_mode_ok (global_init_p);
===================================================================
@@ -18628,12 +18628,13 @@ Supported values for @var{cpu_type} are
@samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
@samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, @samp{powerpc},
-@samp{powerpc64}, and @samp{rs64}.
+@samp{powerpc64}, @samp{powerpc64le}, and @samp{rs64}.
-@option{-mcpu=powerpc}, and @option{-mcpu=powerpc64} specify pure 32-bit
-PowerPC and 64-bit PowerPC architecture machine
-types, with an appropriate, generic processor model assumed for
-scheduling purposes.
+@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
+@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
+endian), 64-bit big endian PowerPC and 64-bit little endian PowerPC
+architecture machine types, with an appropriate, generic processor
+model assumed for scheduling purposes.
The other options specify a specific processor. Code generated under
those options runs best on that processor, and may not run at all on