From patchwork Wed Aug 13 12:34:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Tocar X-Patchwork-Id: 379629 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9F34B140082 for ; Wed, 13 Aug 2014 22:35:14 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=JIEWOI7bqhFimK8N5v/oZ4K1lelezGD2h6Js+0KQeFQIT9Z9Rp YErVm8lVvbLy5qJu69FMTaBoKZf44vdmUNzDuLDfcwAK4IProXP9MiyE5hKs2tjD xUqcjAJqwaHEysYy3eh2rBNr2t566pyRqvhp+I+nShIPwEdOc4YQFvxlA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=U6qs8eJUvY8+UEQH06AVYCwAhY4=; b=iv/e2UxIolkvoOqQfHWq SGznJgHqZvmHqc6hkLLIFXKTXDm20q4ANqUJSnFPkTcaRuhKZJqRlvuGsBnKCDVN EH64NSjHYNIRRzDaxIcTvqdLoy5K4iN2MDaPOBuz4MlQUwiAX3oc/KyuJoBhYZ9e GhopKs0kmS32FfWIqOTdw1Q= Received: (qmail 30842 invoked by alias); 13 Aug 2014 12:35:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 30830 invoked by uid 89); 13 Aug 2014 12:35:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.8 required=5.0 tests=AWL, BAYES_40, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS, SUBJ_ALL_CAPS autolearn=no version=3.3.2 X-HELO: mail-wi0-f175.google.com Received: from mail-wi0-f175.google.com (HELO mail-wi0-f175.google.com) (209.85.212.175) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Wed, 13 Aug 2014 12:35:00 +0000 Received: by mail-wi0-f175.google.com with SMTP id ho1so7321424wib.14 for ; Wed, 13 Aug 2014 05:34:57 -0700 (PDT) X-Received: by 10.180.86.8 with SMTP id l8mr17989845wiz.18.1407933297403; Wed, 13 Aug 2014 05:34:57 -0700 (PDT) Received: from msticlxl7.ims.intel.com (jfdmzpr02-ext.jf.intel.com. [134.134.137.71]) by mx.google.com with ESMTPSA id a11sm4132136wjx.46.2014.08.13.05.34.53 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 13 Aug 2014 05:34:56 -0700 (PDT) Date: Wed, 13 Aug 2014 16:34:39 +0400 From: Ilya Tocar To: GCC Patches Cc: Uros Bizjak Subject: [PATCH] PR61878 Message-ID: <20140813123439.GA122350@msticlxl7.ims.intel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes Hi, This patch adds missing intrinsics and tests for them. Ok for trunk? gcc/ChangeLog: 2014-08-13 Ilya Tocar * config/i386/avx512fintrin.h (_mm512_mask_cmpge_epi32_mask): New. (_mm512_mask_cmpge_epu32_mask): Ditto. (_mm512_cmpge_epu32_mask): Ditto. (_mm512_mask_cmpge_epi64_mask): Ditto. (_mm512_cmpge_epi64_mask): Ditto. (_mm512_mask_cmpge_epu64_mask): Ditto. (_mm512_cmpge_epu64_mask): Ditto. (_mm512_mask_cmple_epi32_mask): Ditto. (_mm512_cmple_epi32_mask): Ditto. (_mm512_mask_cmple_epu32_mask): Ditto. (_mm512_cmple_epu32_mask): Ditto. (_mm512_mask_cmple_epi64_mask): Ditto. (_mm512_cmple_epi64_mask): Ditto. (_mm512_mask_cmple_epu64_mask): Ditto. (_mm512_cmple_epu64_mask): Ditto. (_mm512_mask_cmplt_epi32_mask): Ditto. (_mm512_cmplt_epi32_mask): Ditto. (_mm512_mask_cmplt_epu32_mask): Ditto. (_mm512_cmplt_epu32_mask): Ditto. (_mm512_mask_cmplt_epi64_mask): Ditto. (_mm512_cmplt_epi64_mask): Ditto. (_mm512_mask_cmplt_epu64_mask): Ditto. (_mm512_cmplt_epu64_mask): Ditto. (_mm512_mask_cmpneq_epi32_mask): Ditto. (_mm512_mask_cmpneq_epu32_mask): Ditto. (_mm512_cmpneq_epu32_mask): Ditto. (_mm512_mask_cmpneq_epi64_mask): Ditto. (_mm512_cmpneq_epi64_mask): Ditto. (_mm512_mask_cmpneq_epu64_mask): Ditto. (_mm512_cmpneq_epu64_mask): Ditto. (_mm512_castpd_ps): Ditto. (_mm512_castpd_si512): Ditto. (_mm512_castps_pd): Ditto. (_mm512_castps_si512): Ditto. (_mm512_castsi512_ps): Ditto. (_mm512_castsi512_pd): Ditto. (_mm512_castpd512_pd128): Ditto. (_mm512_castps512_ps128): Ditto. (_mm512_castsi512_si128): Ditto. (_mm512_castpd512_pd256): Ditto. (_mm512_castps512_ps256): Ditto. (_mm512_castsi512_si256): Ditto. (_mm512_castpd128_pd512): Ditto. (_mm512_castps128_ps512): Ditto. (_mm512_castsi128_si512): Ditto. (_mm512_castpd256_pd512): Ditto. (_mm512_castps256_ps512): Ditto. (_mm512_castsi256_si512): Ditto. (_mm512_cmpeq_epu32_mask): Ditto. (_mm512_mask_cmpeq_epu32_mask): Ditto. (_mm512_mask_cmpeq_epu64_mask): Ditto. (_mm512_cmpeq_epu64_mask): Ditto. (_mm512_cmpgt_epu32_mask): Ditto. (_mm512_mask_cmpgt_epu32_mask): Ditto. (_mm512_mask_cmpgt_epu64_mask): Ditto. (_mm512_cmpgt_epu64_mask): Ditto. * config/i386/i386-builtin-types.def: Add V16SF_FTYPE_V8SF, V16SI_FTYPE_V8SI, V16SI_FTYPE_V4SI, V8DF_FTYPE_V2DF. * config/i386/i386.c (enum ix86_builtins): Add IX86_BUILTIN_SI512_SI256, IX86_BUILTIN_PD512_PD256, IX86_BUILTIN_PS512_PS256, IX86_BUILTIN_SI512_SI, IX86_BUILTIN_PD512_PD, IX86_BUILTIN_PS512_PS. (bdesc_args): Add __builtin_ia32_si512_256si, __builtin_ia32_ps512_256ps, __builtin_ia32_pd512_256pd, __builtin_ia32_si512_si, __builtin_ia32_ps512_ps, __builtin_ia32_pd512_pd. (ix86_expand_args_builtin): Handle new FTYPEs. * config/i386/sse.md (castmode): Add 512-bit modes. (AVX512MODE2P): New. (avx512f___256 * gcc.target/i386/avx512f-typecast-1.c: New test. * gcc.target/i386/avx512f-vpcmpequd-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpequd-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpequq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpequq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpged-1.c: Add new intrinsic. * gcc.target/i386/avx512f-vpcmpged-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpgeq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpgeq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpgeud-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpgeud-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpgeuq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpgeuq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpgtud-1.c: New test. * gcc.target/i386/avx512f-vpcmpgtud-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpgtuq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpgtuq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpled-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpled-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpleq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpleq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpleud-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpleud-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpleuq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpleuq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpltd-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpltd-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpltq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpltq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpltud-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpltud-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpltuq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpltuq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpneqd-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpneqd-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpneqq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpneqq-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpnequd-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpnequd-2.c: Ditto. * gcc.target/i386/avx512f-vpcmpnequq-1.c: Ditto. * gcc.target/i386/avx512f-vpcmpnequq-2.c: Ditto. --- gcc/config/i386/avx512fintrin.h | 338 +++++++++++++++++++++ gcc/config/i386/i386-builtin-types.def | 4 + gcc/config/i386/i386.c | 16 + gcc/config/i386/sse.md | 45 ++- gcc/testsuite/gcc.target/i386/avx512f-typecast-1.c | 118 +++++++ .../gcc.target/i386/avx512f-vpcmpequd-1.c | 16 + .../gcc.target/i386/avx512f-vpcmpequd-2.c | 54 ++++ .../gcc.target/i386/avx512f-vpcmpequq-1.c | 16 + .../gcc.target/i386/avx512f-vpcmpequq-2.c | 54 ++++ gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-1.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-2.c | 8 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-1.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpgeud-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpgeud-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpgeuq-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpgeuq-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpgtud-1.c | 16 + .../gcc.target/i386/avx512f-vpcmpgtud-2.c | 54 ++++ .../gcc.target/i386/avx512f-vpcmpgtuq-1.c | 16 + .../gcc.target/i386/avx512f-vpcmpgtuq-2.c | 54 ++++ gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-1.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-2.c | 8 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-1.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpleud-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpleud-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpleuq-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpleuq-2.c | 8 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-1.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-2.c | 8 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-1.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpltud-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpltud-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpltuq-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpltuq-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpneqd-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpneqd-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpneqq-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpneqq-2.c | 7 +- .../gcc.target/i386/avx512f-vpcmpnequd-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpnequd-2.c | 8 +- .../gcc.target/i386/avx512f-vpcmpnequq-1.c | 4 +- .../gcc.target/i386/avx512f-vpcmpnequq-2.c | 8 +- 45 files changed, 959 insertions(+), 33 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-typecast-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpcmpequd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpcmpequd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpcmpequq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpcmpequq-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtud-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtud-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-2.c diff --git a/gcc/config/i386/avx512fintrin.h b/gcc/config/i386/avx512fintrin.h index c4caa5a..3f362d4 100644 --- a/gcc/config/i386/avx512fintrin.h +++ b/gcc/config/i386/avx512fintrin.h @@ -8753,6 +8753,24 @@ _mm512_cmpge_epi32_mask (__m512i __X, __m512i __Y) extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpge_epi32_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask16) __builtin_ia32_cmpd512_mask ((__v16si) __X, + (__v16si) __Y, 5, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpge_epu32_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __X, + (__v16si) __Y, 5, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpge_epu32_mask (__m512i __X, __m512i __Y) { return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __X, @@ -8762,6 +8780,15 @@ _mm512_cmpge_epu32_mask (__m512i __X, __m512i __Y) extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpge_epi64_mask (__mmask8 __M, __m512i __X, __m512i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq512_mask ((__v8di) __X, + (__v8di) __Y, 5, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpge_epi64_mask (__m512i __X, __m512i __Y) { return (__mmask8) __builtin_ia32_cmpq512_mask ((__v8di) __X, @@ -8771,6 +8798,15 @@ _mm512_cmpge_epi64_mask (__m512i __X, __m512i __Y) extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpge_epu64_mask (__mmask8 __M, __m512i __X, __m512i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __X, + (__v8di) __Y, 5, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpge_epu64_mask (__m512i __X, __m512i __Y) { return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __X, @@ -8780,6 +8816,15 @@ _mm512_cmpge_epu64_mask (__m512i __X, __m512i __Y) extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmple_epi32_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask16) __builtin_ia32_cmpd512_mask ((__v16si) __X, + (__v16si) __Y, 2, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmple_epi32_mask (__m512i __X, __m512i __Y) { return (__mmask16) __builtin_ia32_cmpd512_mask ((__v16si) __X, @@ -8789,6 +8834,15 @@ _mm512_cmple_epi32_mask (__m512i __X, __m512i __Y) extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmple_epu32_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __X, + (__v16si) __Y, 2, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmple_epu32_mask (__m512i __X, __m512i __Y) { return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __X, @@ -8798,6 +8852,15 @@ _mm512_cmple_epu32_mask (__m512i __X, __m512i __Y) extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmple_epi64_mask (__mmask8 __M, __m512i __X, __m512i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq512_mask ((__v8di) __X, + (__v8di) __Y, 2, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmple_epi64_mask (__m512i __X, __m512i __Y) { return (__mmask8) __builtin_ia32_cmpq512_mask ((__v8di) __X, @@ -8807,6 +8870,15 @@ _mm512_cmple_epi64_mask (__m512i __X, __m512i __Y) extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmple_epu64_mask (__mmask8 __M, __m512i __X, __m512i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __X, + (__v8di) __Y, 2, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmple_epu64_mask (__m512i __X, __m512i __Y) { return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __X, @@ -8816,6 +8888,15 @@ _mm512_cmple_epu64_mask (__m512i __X, __m512i __Y) extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmplt_epi32_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask16) __builtin_ia32_cmpd512_mask ((__v16si) __X, + (__v16si) __Y, 1, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmplt_epi32_mask (__m512i __X, __m512i __Y) { return (__mmask16) __builtin_ia32_cmpd512_mask ((__v16si) __X, @@ -8825,6 +8906,15 @@ _mm512_cmplt_epi32_mask (__m512i __X, __m512i __Y) extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmplt_epu32_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __X, + (__v16si) __Y, 1, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmplt_epu32_mask (__m512i __X, __m512i __Y) { return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __X, @@ -8834,6 +8924,15 @@ _mm512_cmplt_epu32_mask (__m512i __X, __m512i __Y) extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmplt_epi64_mask (__mmask8 __M, __m512i __X, __m512i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq512_mask ((__v8di) __X, + (__v8di) __Y, 1, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmplt_epi64_mask (__m512i __X, __m512i __Y) { return (__mmask8) __builtin_ia32_cmpq512_mask ((__v8di) __X, @@ -8843,6 +8942,15 @@ _mm512_cmplt_epi64_mask (__m512i __X, __m512i __Y) extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmplt_epu64_mask (__mmask8 __M, __m512i __X, __m512i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __X, + (__v8di) __Y, 1, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmplt_epu64_mask (__m512i __X, __m512i __Y) { return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __X, @@ -8861,6 +8969,24 @@ _mm512_cmpneq_epi32_mask (__m512i __X, __m512i __Y) extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpneq_epi32_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask16) __builtin_ia32_cmpd512_mask ((__v16si) __X, + (__v16si) __Y, 4, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpneq_epu32_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __X, + (__v16si) __Y, 4, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpneq_epu32_mask (__m512i __X, __m512i __Y) { return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __X, @@ -8870,6 +8996,15 @@ _mm512_cmpneq_epu32_mask (__m512i __X, __m512i __Y) extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpneq_epi64_mask (__mmask16 __M, __m512i __X, __m512i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq512_mask ((__v8di) __X, + (__v8di) __Y, 4, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpneq_epi64_mask (__m512i __X, __m512i __Y) { return (__mmask8) __builtin_ia32_cmpq512_mask ((__v8di) __X, @@ -8879,6 +9014,15 @@ _mm512_cmpneq_epi64_mask (__m512i __X, __m512i __Y) extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpneq_epu64_mask (__mmask8 __M, __m512i __X, __m512i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __X, + (__v8di) __Y, 4, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpneq_epu64_mask (__m512i __X, __m512i __Y) { return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __X, @@ -12907,6 +13051,200 @@ _mm512_kmov (__mmask16 __A) return __builtin_ia32_kmov16 (__A); } +extern __inline __m512 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castpd_ps (__m512d __A) +{ + return (__m512) (__A); +} + +extern __inline __m512i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castpd_si512 (__m512d __A) +{ + return (__m512i) (__A); +} + +extern __inline __m512d +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castps_pd (__m512 __A) +{ + return (__m512d) (__A); +} + +extern __inline __m512i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castps_si512 (__m512 __A) +{ + return (__m512i) (__A); +} + +extern __inline __m512 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castsi512_ps (__m512i __A) +{ + return (__m512) (__A); +} + +extern __inline __m512d +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castsi512_pd (__m512i __A) +{ + return (__m512d) (__A); +} + +extern __inline __m128d +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castpd512_pd128 (__m512d __A) +{ + return (__m128d)_mm512_extractf32x4_ps((__m512)__A, 0); +} + +extern __inline __m128 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castps512_ps128 (__m512 __A) +{ + return _mm512_extractf32x4_ps(__A, 0); +} + +extern __inline __m128i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castsi512_si128 (__m512i __A) +{ + return (__m128i)_mm512_extracti32x4_epi32((__m512i)__A, 0); +} + +extern __inline __m256d +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castpd512_pd256 (__m512d __A) +{ + return _mm512_extractf64x4_pd(__A, 0); +} + +extern __inline __m256 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castps512_ps256 (__m512 __A) +{ + return (__m256)_mm512_extractf64x4_pd((__m512d)__A, 0); +} + +extern __inline __m256i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castsi512_si256 (__m512i __A) +{ + return (__m256i)_mm512_extractf64x4_pd((__m512d)__A, 0); +} + +extern __inline __m512d +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castpd128_pd512 (__m128d __A) +{ + return (__m512d) __builtin_ia32_pd512_pd((__m128d)__A); +} + +extern __inline __m512 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castps128_ps512 (__m128 __A) +{ + return (__m512) __builtin_ia32_ps512_ps((__m128)__A); +} + +extern __inline __m512i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castsi128_si512 (__m128i __A) +{ + return (__m512i) __builtin_ia32_si512_si((__v4si)__A); +} + +extern __inline __m512d +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castpd256_pd512 (__m256d __A) +{ + return __builtin_ia32_pd512_256pd (__A); +} + +extern __inline __m512 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castps256_ps512 (__m256 __A) +{ + return __builtin_ia32_ps512_256ps (__A); +} + +extern __inline __m512i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_castsi256_si512 (__m256i __A) +{ + return (__m512i)__builtin_ia32_si512_256si ((__v8si)__A); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpeq_epu32_mask (__m512i __A, __m512i __B) +{ + return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __A, + (__v16si) __B, 0, + (__mmask16) -1); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpeq_epu32_mask (__mmask16 __U, __m512i __A, __m512i __B) +{ + return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __A, + (__v16si) __B, 0, __U); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpeq_epu64_mask (__mmask8 __U, __m512i __A, __m512i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __A, + (__v8di) __B, 0, __U); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpeq_epu64_mask (__m512i __A, __m512i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __A, + (__v8di) __B, 0, + (__mmask8) -1); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpgt_epu32_mask (__m512i __A, __m512i __B) +{ + return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __A, + (__v16si) __B, 6, + (__mmask16) -1); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpgt_epu32_mask (__mmask16 __U, __m512i __A, __m512i __B) +{ + return (__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si) __A, + (__v16si) __B, 6, __U); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpgt_epu64_mask (__mmask8 __U, __m512i __A, __m512i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __A, + (__v8di) __B, 6, __U); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpgt_epu64_mask (__m512i __A, __m512i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di) __A, + (__v8di) __B, 6, + (__mmask8) -1); +} + #ifdef __DISABLE_AVX512F__ #undef __DISABLE_AVX512F__ #pragma GCC pop_options diff --git a/gcc/config/i386/i386-builtin-types.def b/gcc/config/i386/i386-builtin-types.def index 35c0035..9161287 100644 --- a/gcc/config/i386/i386-builtin-types.def +++ b/gcc/config/i386/i386-builtin-types.def @@ -273,7 +273,9 @@ DEF_FUNCTION_TYPE (V16SI, INT) DEF_FUNCTION_TYPE (V8DF, DOUBLE) DEF_FUNCTION_TYPE (V8DI, INT64) DEF_FUNCTION_TYPE (V16SF, V4SF) +DEF_FUNCTION_TYPE (V16SF, V8SF) DEF_FUNCTION_TYPE (V8DF, V4DF) +DEF_FUNCTION_TYPE (V8DF, V2DF) DEF_FUNCTION_TYPE (V8DI, V4DI) DEF_FUNCTION_TYPE (V16QI, V8DI) DEF_FUNCTION_TYPE (UINT, V4SF) @@ -281,6 +283,8 @@ DEF_FUNCTION_TYPE (UINT64, V4SF) DEF_FUNCTION_TYPE (UINT, V2DF) DEF_FUNCTION_TYPE (UINT64, V2DF) DEF_FUNCTION_TYPE (V16SI, V16SI) +DEF_FUNCTION_TYPE (V16SI, V4SI) +DEF_FUNCTION_TYPE (V16SI, V8SI) DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI, HI) DEF_FUNCTION_TYPE (V8DI, V8DI) DEF_FUNCTION_TYPE (V8DI, V8DI, V8DI, QI) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index aae1cfd..7961d9c 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -28103,6 +28103,12 @@ enum ix86_builtins IX86_BUILTIN_GATHERDIV8SI, /* AVX512F */ + IX86_BUILTIN_SI512_SI256, + IX86_BUILTIN_PD512_PD256, + IX86_BUILTIN_PS512_PS256, + IX86_BUILTIN_SI512_SI, + IX86_BUILTIN_PD512_PD, + IX86_BUILTIN_PS512_PS, IX86_BUILTIN_ADDPD512, IX86_BUILTIN_ADDPS512, IX86_BUILTIN_ADDSD_ROUND, @@ -30000,6 +30006,12 @@ static const struct builtin_description bdesc_args[] = { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pext_di3, "__builtin_ia32_pext_di", IX86_BUILTIN_PEXT64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, /* AVX512F */ + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_si512_256si, "__builtin_ia32_si512_256si", IX86_BUILTIN_SI512_SI256, UNKNOWN, (int) V16SI_FTYPE_V8SI }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_ps512_256ps, "__builtin_ia32_ps512_256ps", IX86_BUILTIN_PS512_PS256, UNKNOWN, (int) V16SF_FTYPE_V8SF }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_pd512_256pd, "__builtin_ia32_pd512_256pd", IX86_BUILTIN_PD512_PD256, UNKNOWN, (int) V8DF_FTYPE_V4DF }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_si512_si, "__builtin_ia32_si512_si", IX86_BUILTIN_SI512_SI, UNKNOWN, (int) V16SI_FTYPE_V4SI }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_ps512_ps, "__builtin_ia32_ps512_ps", IX86_BUILTIN_PS512_PS, UNKNOWN, (int) V16SF_FTYPE_V4SF }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_pd512_pd, "__builtin_ia32_pd512_pd", IX86_BUILTIN_PD512_PD, UNKNOWN, (int) V8DF_FTYPE_V2DF }, { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_alignv16si_mask, "__builtin_ia32_alignd512_mask", IX86_BUILTIN_ALIGND512, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_INT_V16SI_HI }, { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_alignv8di_mask, "__builtin_ia32_alignq512_mask", IX86_BUILTIN_ALIGNQ512, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_INT_V8DI_QI }, { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_blendmv16si, "__builtin_ia32_blendmd_512_mask", IX86_BUILTIN_BLENDMD512, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_HI }, @@ -33637,7 +33649,10 @@ ix86_expand_args_builtin (const struct builtin_description *d, case V16SI_FTYPE_V16SI: case V16SI_FTYPE_INT: case V16SF_FTYPE_FLOAT: + case V16SF_FTYPE_V8SF: + case V16SI_FTYPE_V8SI: case V16SF_FTYPE_V4SF: + case V16SI_FTYPE_V4SI: case V16SF_FTYPE_V16SF: case V8HI_FTYPE_V8DI: case V8UHI_FTYPE_V8UHI: @@ -33650,6 +33665,7 @@ ix86_expand_args_builtin (const struct builtin_description *d, case V8DI_FTYPE_V8DI: case V8DF_FTYPE_DOUBLE: case V8DF_FTYPE_V4DF: + case V8DF_FTYPE_V2DF: case V8DF_FTYPE_V8DF: case V8DF_FTYPE_V8SI: nargs = 1; diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 3337104..09c3bcd 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -607,7 +607,9 @@ [(V16QI "7") (V8HI "15") (V4SI "31") (V2DI "63")]) ;; Mapping of mode to cast intrinsic name -(define_mode_attr castmode [(V8SI "si") (V8SF "ps") (V4DF "pd")]) +(define_mode_attr castmode + [(V8SI "si") (V8SF "ps") (V4DF "pd") + (V16SI "si") (V16SF "ps") (V8DF "pd")]) ;; Instruction suffix for sign and zero extensions. (define_code_attr extsuffix [(sign_extend "sx") (zero_extend "zx")]) @@ -621,6 +623,7 @@ ;; Mix-n-match (define_mode_iterator AVX256MODE2P [V8SI V8SF V4DF]) +(define_mode_iterator AVX512MODE2P [V16SI V16SF V8DF]) ;; Mapping of immediate bits for blend instructions (define_mode_attr blendbits @@ -15674,3 +15677,43 @@ [(set_attr "type" "sselog1") (set_attr "length_immediate" "1") (set_attr "mode" "TI")]) + +(define_insn_and_split "avx512f__" + [(set (match_operand:AVX512MODE2P 0 "nonimmediate_operand" "=x,m") + (unspec:AVX512MODE2P + [(match_operand: 1 "nonimmediate_operand" "xm,x")] + UNSPEC_CAST))] + "TARGET_AVX512F" + "#" + "&& reload_completed" + [(const_int 0)] +{ + rtx op0 = operands[0]; + rtx op1 = operands[1]; + if (REG_P (op0)) + op0 = gen_rtx_REG (mode, REGNO (op0)); + else + op1 = gen_rtx_REG (mode, REGNO (op1)); + emit_move_insn (op0, op1); + DONE; +}) + +(define_insn_and_split "avx512f__256" + [(set (match_operand:AVX512MODE2P 0 "nonimmediate_operand" "=x,m") + (unspec:AVX512MODE2P + [(match_operand: 1 "nonimmediate_operand" "xm,x")] + UNSPEC_CAST))] + "TARGET_AVX512F" + "#" + "&& reload_completed" + [(const_int 0)] +{ + rtx op0 = operands[0]; + rtx op1 = operands[1]; + if (REG_P (op0)) + op0 = gen_rtx_REG (mode, REGNO (op0)); + else + op1 = gen_rtx_REG (mode, REGNO (op1)); + emit_move_insn (op0, op1); + DONE; +}) diff --git a/gcc/testsuite/gcc.target/i386/avx512f-typecast-1.c b/gcc/testsuite/gcc.target/i386/avx512f-typecast-1.c new file mode 100644 index 0000000..60243d6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-typecast-1.c @@ -0,0 +1,118 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ + +#include "avx512f-check.h" + + +void +avx512f_test (void) +{ + union512i_d a, ad; + union512 b, bd; + union512d c, cd; + union256i_d d, dd; + union256 e, ed; + union256d f, fd; + union128i_d g, gd; + union128 h, hd; + union128d k, kd; + int i; + + for (i = 0; i < 16; i++) + { + a.a[i] = 7146908634 + i; + b.a[i] = 45.12f + i; + } + + for (i = 0; i < 8; i++) + { + c.a[i] = 41234512513451345.0905 + i; + d.a[i] = 109534 + i; + e.a[i] = 85034.095f + i; + } + + for (i = 0; i < 4; i++) + { + f.a[i] = 41234512451345.0905 + i; + g.a[i] = 71469086341 + i; + h.a[i] = 45.1264f + i; + } + + for (i = 0; i < 2; i++) + { + k.a[i] = 7146908634.576 + i; + } + + bd.x = _mm512_castpd_ps (c.x); + if (memcmp(bd.a, c.a, 64)) + abort (); + + ad.x = _mm512_castpd_si512 (c.x); + if (memcmp(ad.a, c.a, 64)) + abort (); + + cd.x = _mm512_castps_pd (b.x); + if (memcmp(cd.a, b.a, 64)) + abort (); + + ad.x = _mm512_castps_si512 (b.x); + if (memcmp(ad.a, b.a, 64)) + abort (); + + bd.x = _mm512_castsi512_ps (a.x); + if (memcmp(bd.a, a.a, 64)) + abort (); + + cd.x = _mm512_castsi512_pd (a.x); + if (memcmp(cd.a, a.a, 64)) + abort (); + + kd.x = _mm512_castpd512_pd128 (c.x); + if (memcmp(kd.a, c.a, 16)) + abort (); + + hd.x = _mm512_castps512_ps128 (b.x); + if (memcmp(hd.a, b.a, 16)) + abort (); + + gd.x = _mm512_castsi512_si128 (a.x); + if (memcmp(gd.a, a.a, 16)) + abort (); + + fd.x = _mm512_castpd512_pd256 (c.x); + if (memcmp(fd.a, c.a, 32)) + abort (); + + ed.x = _mm512_castps512_ps256 (b.x); + if (memcmp(ed.a, b.a, 32)) + abort (); + + dd.x = _mm512_castsi512_si256 (a.x); + if (memcmp(dd.a, a.a, 32)) + abort (); + + cd.x = _mm512_castpd128_pd512 (k.x); + if (memcmp(cd.a, k.a, 16)) + abort (); + + bd.x = _mm512_castps128_ps512 (h.x); + if (memcmp(bd.a, h.a, 16)) + abort (); + + ad.x = _mm512_castsi128_si512 (g.x); + if (memcmp(ad.a, g.a, 16)) + abort (); + + cd.x = _mm512_castpd256_pd512 (f.x); + if (memcmp(cd.a, f.a, 32)) + abort (); + + bd.x = _mm512_castps256_ps512 (e.x); + if (memcmp(bd.a, e.a, 32)) + abort (); + + ad.x = _mm512_castsi256_si512 (d.x); + if (memcmp(ad.a, d.a, 32)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequd-1.c new file mode 100644 index 0000000..8ef65f6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequd-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ + +#include + +volatile __m512i x; +volatile __mmask16 m; + +void extern +avx512f_test (void) +{ + m = _mm512_cmpeq_epu32_mask (x, x); + m = _mm512_mask_cmpeq_epu32_mask (3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequd-2.c new file mode 100644 index 0000000..95ed318 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequd-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ + +#define AVX512F + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +static void +CALC (MASK_TYPE *r, unsigned int *s1, unsigned int *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] == s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_d) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + res1 = 0; + res2 = 0; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpeq_epu32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpeq_epu32_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequq-1.c new file mode 100644 index 0000000..b04a107 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequq-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ + +#include + +volatile __m512i x; +volatile __mmask8 m; + +void extern +avx512f_test (void) +{ + m = _mm512_cmpeq_epu64_mask (x, x); + m = _mm512_mask_cmpeq_epu64_mask (3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequq-2.c new file mode 100644 index 0000000..a72a932 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpequq-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ + +#define AVX512F + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +static void +CALC (MASK_TYPE *r, unsigned long long *s1, unsigned long long *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] == s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_q) src1, src2; + MASK_TYPE res1, res2, res_ref; + MASK_TYPE mask = MASK_VALUE; + res1 = 0; + res2 = 0; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpeq_epu64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpeq_epu64_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res1 != res_ref) + abort (); + + res_ref &= mask; + + if (res2 != res_ref) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-1.c index 83c259e..3d2b173 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpge_epi32_mask (x, x); + m = _mm512_mask_cmpge_epi32_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-2.c index f2e7812..906a0db 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpged-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_d) src1, src2; - MASK_TYPE res_ref, res1; + MASK_TYPE res_ref, res1, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmpge_epi32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpge_epi32_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res_ref != res1) abort (); + + res_ref &= MASK_VALUE; + + if (res_ref != res2) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-1.c index ec7a175..dde035c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpge_epi64_mask (x, x); + m = _mm512_mask_cmpge_epi64_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-2.c index b77798a..8ff3901 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeq-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_q) src1, src2; - MASK_TYPE res1, res_ref; + MASK_TYPE res1, res_ref, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmpge_epi64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpge_epi64_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res1 != res_ref) abort (); + + res_ref &= MASK_VALUE; + + if (res2 != res_ref) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeud-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeud-1.c index 3db73a9..cb26b33 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeud-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeud-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpge_epu32_mask (x, x); + m = _mm512_mask_cmpge_epu32_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeud-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeud-2.c index ed73934..3af07b1 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeud-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_d) src1, src2; - MASK_TYPE res_ref, res1; + MASK_TYPE res_ref, res1, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmpge_epu32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpge_epu32_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res_ref != res1) abort (); + + res_ref &= MASK_VALUE; + + if (res_ref != res2) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeuq-1.c index 4d9c3f4..4f71dab 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeuq-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpge_epu64_mask (x, x); + m = _mm512_mask_cmpge_epu64_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeuq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeuq-2.c index a4ae995..bd776bd 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeuq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgeuq-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_q) src1, src2; - MASK_TYPE res1, res_ref; + MASK_TYPE res1, res_ref, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmpge_epu64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpge_epu64_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res1 != res_ref) abort (); + + res_ref &= MASK_VALUE; + + if (res2 != res_ref) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtud-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtud-1.c new file mode 100644 index 0000000..cce93ae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtud-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ + +#include + +volatile __m512i x; +volatile __mmask16 m; + +void extern +avx512f_test (void) +{ + m = _mm512_cmpgt_epu32_mask (x, x); + m = _mm512_mask_cmpgt_epu32_mask (3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtud-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtud-2.c new file mode 100644 index 0000000..5c65c81 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtud-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ + +#define AVX512F + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +static void +CALC (MASK_TYPE *r, unsigned int *s1, unsigned int *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] > s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_d) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + res1 = 0; + res2 = 0; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpgt_epu32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpgt_epu32_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c new file mode 100644 index 0000000..0bf4d1a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ + +#include + +volatile __m512i x; +volatile __mmask8 m; + +void extern +avx512f_test (void) +{ + m = _mm512_cmpgt_epu64_mask (x, x); + m = _mm512_mask_cmpgt_epu64_mask (3, x, x); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-2.c new file mode 100644 index 0000000..c8d019c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ + +#define AVX512F + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +static void +CALC (MASK_TYPE *r, unsigned long long *s1, unsigned long long *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] > s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_q) src1, src2; + MASK_TYPE res1, res2, res_ref; + MASK_TYPE mask = MASK_VALUE; + res1 = 0; + res2 = 0; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpgt_epu64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpgt_epu64_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res1 != res_ref) + abort (); + + res_ref &= mask; + + if (res2 != res_ref) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-1.c index 68f085a..5cd6efb 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmple_epi32_mask (x, x); + m = _mm512_mask_cmple_epi32_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-2.c index 1def421..a116a6c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpled-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_d) src1, src2; - MASK_TYPE res_ref, res1; + MASK_TYPE res_ref, res1, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmple_epi32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmple_epi32_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res_ref != res1) abort (); + + res_ref &= MASK_VALUE; + + if (res_ref != res2) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-1.c index 0d5b6fa..a93ec4b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmple_epi64_mask (x, x); + m = _mm512_mask_cmple_epi64_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-2.c index 9ed536d..f6fec98 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleq-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_q) src1, src2; - MASK_TYPE res1, res_ref; + MASK_TYPE res1, res_ref, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmple_epi64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmple_epi64_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res1 != res_ref) abort (); + + res_ref &= MASK_VALUE; + + if (res2 != res_ref) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleud-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleud-1.c index 902f4ab..0912fbd 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleud-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleud-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmple_epu32_mask (x, x); + m = _mm512_mask_cmple_epu32_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleud-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleud-2.c index 56dcc81..ab6ea7e 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleud-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_d) src1, src2; - MASK_TYPE res_ref, res1; + MASK_TYPE res_ref, res1, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmple_epu32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmple_epu32_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res_ref != res1) abort (); + + res_ref &= MASK_VALUE; + + if (res_ref != res2) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleuq-1.c index 5c5f0e5..bfe3e4c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleuq-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmple_epu64_mask (x, x); + m = _mm512_mask_cmple_epu64_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleuq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleuq-2.c index d0c3587..6154134 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleuq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpleuq-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_q) src1, src2; - MASK_TYPE res1, res_ref; + MASK_TYPE res1, res_ref, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmple_epu64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmple_epu64_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res1 != res_ref) abort (); + + res_ref &= MASK_VALUE; + + if (res2 != res_ref) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-1.c index 16bb1bf..80d7c17 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmplt_epi32_mask (x, x); + m = _mm512_mask_cmplt_epi32_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-2.c index f0033f6..fa5278d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltd-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_d) src1, src2; - MASK_TYPE res_ref, res1; + MASK_TYPE res_ref, res1, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmplt_epi32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmplt_epi32_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res_ref != res1) abort (); + + res_ref &= MASK_VALUE; + + if (res_ref != res2) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-1.c index 0e87ad1..81a30cd 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmplt_epi64_mask (x, x); + m = _mm512_mask_cmplt_epi64_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-2.c index f4e68cf..abc1ee3 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltq-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_q) src1, src2; - MASK_TYPE res1, res_ref; + MASK_TYPE res1, res_ref, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmplt_epi64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmplt_epi64_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res1 != res_ref) abort (); + + res_ref &= MASK_VALUE; + + if (res2 != res_ref) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltud-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltud-1.c index 0ad8fd1..727e05d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltud-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltud-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmplt_epu32_mask (x, x); + m = _mm512_mask_cmplt_epu32_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltud-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltud-2.c index 5168e56..a4e1348 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltud-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_d) src1, src2; - MASK_TYPE res_ref, res1; + MASK_TYPE res_ref, res1, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmplt_epu32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmplt_epu32_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res_ref != res1) abort (); + + res_ref &= MASK_VALUE; + + if (res_ref != res2) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltuq-1.c index d428b00..af7ea5e 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltuq-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmplt_epu64_mask (x, x); + m = _mm512_mask_cmplt_epu64_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltuq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltuq-2.c index df813d5..d492dbc 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltuq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpltuq-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_q) src1, src2; - MASK_TYPE res1, res_ref; + MASK_TYPE res1, res_ref, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmplt_epu64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmplt_epu64_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res1 != res_ref) abort (); + + res_ref &= MASK_VALUE; + + if (res2 != res_ref) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqd-1.c index 2cffad5..ed0a8b3 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqd-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpneq_epi32_mask (x, x); + m = _mm512_mask_cmpneq_epi32_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqd-2.c index 0655779..6e65693 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqd-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_d) src1, src2; - MASK_TYPE res_ref, res1; + MASK_TYPE res_ref, res1, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmpneq_epi32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpneq_epi32_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res_ref != res1) abort (); + + res_ref &= MASK_VALUE; + + if (res_ref != res2) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqq-1.c index 4a2928a..4b92f02 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqq-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpneq_epi64_mask (x, x); + m = _mm512_mask_cmpneq_epi64_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqq-2.c index 6968584..2277c94 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpneqq-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_q) src1, src2; - MASK_TYPE res1, res_ref; + MASK_TYPE res1, res_ref, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,14 @@ TEST (void) } res1 = INTRINSIC (_cmpneq_epi64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpneq_epi64_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res1 != res_ref) abort (); + + res_ref &= MASK_VALUE; + if (res2 != res_ref) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequd-1.c index 2c20479..e386c36 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequd-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpneq_epu32_mask (x, x); + m = _mm512_mask_cmpneq_epu32_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequd-2.c index 3ca100b..e024432 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequd-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_d) src1, src2; - MASK_TYPE res_ref, res1; + MASK_TYPE res_ref, res1, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmpneq_epu32_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpneq_epu32_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res_ref != res1) abort (); + + res_ref &= MASK_VALUE; + + if (res_ref != res2) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequq-1.c index 7701493..247443a 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequq-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */ #include @@ -11,4 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpneq_epu64_mask (x, x); + m = _mm512_mask_cmpneq_epu64_mask (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequq-2.c index b329806..9b13b2b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequq-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpnequq-2.c @@ -26,7 +26,7 @@ TEST (void) { int i; UNION_TYPE (AVX512F_LEN, i_q) src1, src2; - MASK_TYPE res1, res_ref; + MASK_TYPE res1, res_ref, res2; res1 = 0; for (i = 0; i < SIZE / 2; i++) @@ -38,9 +38,15 @@ TEST (void) } res1 = INTRINSIC (_cmpneq_epu64_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpneq_epu64_mask) (MASK_VALUE, src1.x, src2.x); CALC (&res_ref, src1.a, src2.a); if (res1 != res_ref) abort (); + + res_ref &= MASK_VALUE; + + if (res2 != res_ref) + abort (); }