From patchwork Tue Nov 19 06:59:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Modra X-Patchwork-Id: 292308 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 19A852C00E4 for ; Tue, 19 Nov 2013 17:59:56 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; q=dns; s=default; b=jkY7i98NQOQV4a/Ah wBp5NfN3s1G4/o455bR7KbLRCXGJ8jRZieHufmU8/AXPUddbhXngwxJlwuTUWpG2 q6D3Ecdi01/lExHxt1qRzqm91MqAeaccJUXIq0+UPS9/HDpkdB0ezwYOuAUtnTBG xDO/P0oHz1VDsk5orA+xWaDgnc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; s=default; bh=ole+4zuIWEBf3U38DSX2e2C 0bD4=; b=NVnzYnuARwGxaZJnRCJwhyR2WHOEdkmJo2rUAh8g9tSYdwV/mMo/QuP ob279awgpmUs1EMoM6sruBNxGciE2JPZjKgzdnj3a6siuEpPsDnf8Dak9mQ2/KqT 08ZcnbXTyVqZyBLmFxLorOzStMyOj35lyQs4ayrT+ioBLrYjpiwg= Received: (qmail 22462 invoked by alias); 19 Nov 2013 06:59:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 22453 invoked by uid 89); 19 Nov 2013 06:59:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.2 required=5.0 tests=AWL, BAYES_50, FREEMAIL_FROM, RDNS_NONE, SPF_PASS autolearn=no version=3.3.2 X-HELO: mail-pd0-f182.google.com Received: from Unknown (HELO mail-pd0-f182.google.com) (209.85.192.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 19 Nov 2013 06:59:41 +0000 Received: by mail-pd0-f182.google.com with SMTP id v10so2120851pde.13 for ; Mon, 18 Nov 2013 22:59:33 -0800 (PST) X-Received: by 10.66.161.38 with SMTP id xp6mr6414550pab.145.1384844373012; Mon, 18 Nov 2013 22:59:33 -0800 (PST) Received: from bubble.grove.modra.org ([101.166.26.37]) by mx.google.com with ESMTPSA id km1sm9085830pbd.23.2013.11.18.22.59.30 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 18 Nov 2013 22:59:32 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id 7D8FAEA006D; Tue, 19 Nov 2013 17:29:27 +1030 (CST) Date: Tue, 19 Nov 2013 17:29:27 +1030 From: Alan Modra To: David Edelsohn , gcc-patches@gcc.gnu.org Cc: Michael Meissner Subject: Re: [RS6000] strict alignment for little-endian Message-ID: <20131119065927.GB22514@bubble.grove.modra.org> Mail-Followup-To: David Edelsohn , gcc-patches@gcc.gnu.org, Michael Meissner References: <20130607012439.GH6878@bubble.grove.modra.org> <20130610191404.GA300@ibm-tiger.the-meissners.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20130610191404.GA300@ibm-tiger.the-meissners.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes On Mon, Jun 10, 2013 at 03:14:04PM -0400, Michael Meissner wrote: > On Fri, Jun 07, 2013 at 10:54:39AM +0930, Alan Modra wrote: > > I'd like to remove -mstrict-align for little-endian powerpc, because > > the assumption that mis-aligned accesses are massively slow isn't true > > for current powerpc processors. However I also don't want to break > > old machines, so probably should add -mstrict-align back for some set > > of cpus. Can anyone tell me the set? > > I don't know the set. I recall the original PPC's (604, 603, etc.) had the > strict alignment rule in little endian rule, and the 750 relaxed it for GPRs > (but not FPRs), but I don't know about later machines. After some research and bothering people who ought to know, I came up with the following: Since modern powerpc processors that support little-endian (power6 and later) do so properly rather than via the low bit swizzling of older processors (603, 604, 750, 74xx) we don't take traps on all unaligned accesses. Even so, power6 and power7 still take more alignment traps in little-endian mode than big-endian, so it may be advantageous to leave -mstrict-align as the default for power7. Anton tells me that for power8, -mstrict-align is not necessary. It's not desirable since gcc easily loses track of alignment, for instance with -mstrict-align void foo (char *p, char *q) { __builtin_memcpy (p, q, 4); } generates lbz 7,0(4) lbz 8,1(4) lbz 10,2(4) lbz 9,3(4) stb 7,0(3) stb 8,1(3) stb 10,2(3) stb 9,3(3) blr whereas -mno-strict-align gives lwz 9,0(4) stw 9,0(3) blr This patch disables the default -mstrict-align on power8. Rather than testing values from enum processor_type, which is prone to error when adding a new processor, I chose one of the mask bits that happens to be set for power8, and is likely to be set for future new processors. I also take the opportunity to update PROCESSOR_DEFAULT64 to the value most likely appropriate for machines running ELFv2. Bootstrapped and regression tested powerpc64-linux. OK to apply? David, it also occurs to me that PROCESSOR_DEFAULT* isn't the best choice of macro name nowadays. The macro is only used to default -mtune, not -mcpu. If you think it a good idea, I'll s/PROCESSOR_DEFAULT/TUNE_DEFAULT/ throughout config/rs6000 as a followup commit to this one. * config/rs6000/sysv4.h (CC1_ENDIAN_LITTLE_SPEC): Define as empty. * config/rs6000/rs6000.c (rs6000_option_override_internal): Default to strict alignment on older processors when little-endian. * config/rs6000/linux64.h (PROCESSOR_DEFAULT64): Default to power8 for ELFv2. Index: gcc/config/rs6000/linux64.h =================================================================== --- gcc/config/rs6000/linux64.h (revision 205002) +++ gcc/config/rs6000/linux64.h (working copy) @@ -71,7 +71,11 @@ #undef PROCESSOR_DEFAULT #define PROCESSOR_DEFAULT PROCESSOR_POWER7 #undef PROCESSOR_DEFAULT64 +#ifdef LINUX64_DEFAULT_ABI_ELFv2 +#define PROCESSOR_DEFAULT64 PROCESSOR_POWER8 +#else #define PROCESSOR_DEFAULT64 PROCESSOR_POWER7 +#endif /* We don't need to generate entries in .fixup, except when -mrelocatable or -mrelocatable-lib is given. */ Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 205002) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -3217,6 +3217,12 @@ } } + /* If little-endian, default to -mstrict-align on older processors. + Testing for htm matches power8 and later. */ + if (!BYTES_BIG_ENDIAN + && !(processor_target_table[tune_index].target_enable & OPTION_MASK_HTM)) + rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN; + /* Add some warnings for VSX. */ if (TARGET_VSX) { Index: gcc/config/rs6000/sysv4.h =================================================================== --- gcc/config/rs6000/sysv4.h (revision 205002) +++ gcc/config/rs6000/sysv4.h (working copy) @@ -538,12 +538,7 @@ #define CC1_ENDIAN_BIG_SPEC "" -#define CC1_ENDIAN_LITTLE_SPEC "\ -%{!mstrict-align: %{!mno-strict-align: \ - %{!mcall-i960-old: \ - -mstrict-align \ - } \ -}}" +#define CC1_ENDIAN_LITTLE_SPEC "" #define CC1_ENDIAN_DEFAULT_SPEC "%(cc1_endian_big)"