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Violators will be prosecuted; Fri, 19 Oct 2012 15:11:41 -0400 Received: from d01relay05.pok.ibm.com (d01relay05.pok.ibm.com [9.56.227.237]) by d01dlp01.pok.ibm.com (Postfix) with ESMTP id 928A038C8091 for ; Fri, 19 Oct 2012 15:11:40 -0400 (EDT) Received: from d01av01.pok.ibm.com (d01av01.pok.ibm.com [9.56.224.215]) by d01relay05.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id q9JJBeYo335342 for ; Fri, 19 Oct 2012 15:11:40 -0400 Received: from d01av01.pok.ibm.com (loopback [127.0.0.1]) by d01av01.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id q9JJBdaq030303 for ; Fri, 19 Oct 2012 15:11:39 -0400 Received: from ibm-tiger.the-meissners.org ([9.33.48.180]) by d01av01.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id q9JJBZrb029627; Fri, 19 Oct 2012 15:11:35 -0400 Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id EA1BC4232F; Fri, 19 Oct 2012 15:11:32 -0400 (EDT) Date: Fri, 19 Oct 2012 15:11:32 -0400 From: Michael Meissner To: Dominique Dhumieres Cc: meissner@linux.vnet.ibm.com, ebotcazou@adacore.com, gcc-patches@gcc.gnu.org, dje.gcc@gmail.com Subject: Re: [PATCH] Rs6000 infrastructure cleanup (switches), revised patch #2f Message-ID: <20121019191132.GA5457@ibm-tiger.the-meissners.org> Mail-Followup-To: Michael Meissner , Dominique Dhumieres , ebotcazou@adacore.com, gcc-patches@gcc.gnu.org, dje.gcc@gmail.com References: <20121018190834.1806A3BABA@mailhost.lps.ens.fr> <20121018213539.GA27729@ibm-tiger.the-meissners.org> <20121018230650.GA28111@ibm-tiger.the-meissners.org> <4951624.QQdz3T4LAe@polaris> <20121019135947.946AF3BABA@mailhost.lps.ens.fr> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20121019135947.946AF3BABA@mailhost.lps.ens.fr> User-Agent: Mutt/1.5.20 (2009-12-10) X-Content-Scanned: Fidelis XPS MAILER x-cbid: 12101919-7182-0000-0000-000002E382F0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org I checked in your patch along with my patches into the trunk. [gcc] 2012-10-19 Michael Meissner Dominique Dhumieres * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Don't assume OPTION_MASK_STRICT_ALIGN is defined. (MASK_STRICT_ALIGN): If OPTION_MASK_STRICT_ALIGN is not defined, define this to 0 for the 3 ports that use it. * config/rs6000/rs6000.c (OPTION_MASK_STRICT_ALIGN): Don't do check for ports not having -mstrict-align here, move test to rs6000-cpus.def. (MASK_STRICT_ALIGN): Likewise. (rs6000_debug_reg_global): Print out correct target flag words if -mdebug=reg. [libobjc] 2012-10-19 Michael Meissner * encoding.c (TARGET_VSX): Provide definitions based on the current compilation options, and not based off the target options structure. (TARGET_ALTIVEC): Likewise. (TARGET_64BIT): Likewise. Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 192622) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -1121,10 +1121,6 @@ static const struct attribute_spec rs600 { NULL, 0, 0, false, false, false, NULL, false } }; -#ifndef OPTION_MASK_STRICT_ALIGN -#define OPTION_MASK_STRICT_ALIGN 0 -#define MASK_STRICT_ALIGN 0 -#endif #ifndef TARGET_PROFILE_KERNEL #define TARGET_PROFILE_KERNEL 0 #endif @@ -1805,10 +1801,11 @@ rs6000_debug_reg_global (void) fprintf (stderr, DEBUG_FMT_S, "tune", ""); cl_target_option_save (&cl_opts, &global_options); - rs6000_print_isa_options (stderr, 0, "target_flags", target_flags); + rs6000_print_isa_options (stderr, 0, "rs6000_isa_flags", + rs6000_isa_flags); - rs6000_print_isa_options (stderr, 0, "target_flags_explicit", - target_flags_explicit); + rs6000_print_isa_options (stderr, 0, "rs6000_isa_flags_explicit", + rs6000_isa_flags_explicit); rs6000_print_builtin_options (stderr, 0, "rs6000_builtin_mask", rs6000_builtin_mask); Index: gcc/config/rs6000/rs6000-cpus.def =================================================================== --- gcc/config/rs6000/rs6000-cpus.def (revision 192622) +++ gcc/config/rs6000/rs6000-cpus.def (working copy) @@ -46,6 +46,17 @@ #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC) +/* Deal with ports that do not have -mstrict-align. */ +#ifdef OPTION_MASK_STRICT_ALIGN +#define OPTION_MASK_STRICT_ALIGN_OPTIONAL OPTION_MASK_STRICT_ALIGN +#else +#define OPTION_MASK_STRICT_ALIGN 0 +#define OPTION_MASK_STRICT_ALIGN_OPTIONAL 0 +#ifndef MASK_STRICT_ALIGN +#define MASK_STRICT_ALIGN 0 +#endif +#endif + /* Mask of all options to set the default isa flags based on -mcpu=. */ #define POWERPC_MASKS (OPTION_MASK_ALTIVEC \ | OPTION_MASK_CMPB \ @@ -64,7 +75,7 @@ | OPTION_MASK_PPC_GPOPT \ | OPTION_MASK_RECIP_PRECISION \ | OPTION_MASK_SOFT_FLOAT \ - | OPTION_MASK_STRICT_ALIGN \ + | OPTION_MASK_STRICT_ALIGN_OPTIONAL \ | OPTION_MASK_VSX) #endif Index: libobjc/encoding.c =================================================================== --- libobjc/encoding.c (revision 192622) +++ libobjc/encoding.c (working copy) @@ -112,6 +112,32 @@ static int __attribute__ ((__unused__)) #undef ALTIVEC_VECTOR_MODE #define ALTIVEC_VECTOR_MODE(MODE) (0) +/* Replace TARGET_VSX, TARGET_ALTIVEC, and TARGET_64BIT with constants based on + the current switches, rather than looking in the options structure. */ +#ifdef _ARCH_PPC +#undef TARGET_VSX +#undef TARGET_ALTIVEC +#undef TARGET_64BIT + +#ifdef __VSX__ +#define TARGET_VSX 1 +#else +#define TARGET_VSX 0 +#endif + +#ifdef __ALTIVEC__ +#define TARGET_ALTIVEC 1 +#else +#define TARGET_ALTIVEC 0 +#endif + +#ifdef _ARCH_PPC64 +#define TARGET_64BIT 1 +#else +#define TARGET_64BIT 0 +#endif +#endif + /* Furthermore, some (powerpc) targets also use TARGET_ALIGN_NATURAL in their alignment macros. Currently[4.5/6], rs6000.h points this to a static variable, initialized by target overrides. This is reset Index: libobjc/ChangeLog =================================================================== --- libobjc/ChangeLog (revision 192622) +++ libobjc/ChangeLog (working copy) @@ -1,3 +1,11 @@ +2012-10-19 Michael Meissner + + * encoding.c (TARGET_VSX): Provide definitions based on the + current compilation options, and not based off the target options + structure. + (TARGET_ALTIVEC): Likewise. + (TARGET_64BIT): Likewise. + 2012-09-14 David Edelsohn * configure: Regenerated.