===================================================================
@@ -1497,6 +1497,11 @@ ARM target generates 32-bit code.
@item arm_eabi
ARM target adheres to the ABI for the ARM Architecture.
+@item arm_hf_eabi
+ARM target adheres to the VFP and Advanced SIMD Register Arguments
+variant of the ABI for the ARM Architecture (as selected with
+@code{-mfloat-abi=hard}).
+
@item arm_hard_vfp_ok
ARM target supports @code{-mfpu=vfp -mfloat-abi=hard}.
Some multilibs may be incompatible with these options.
===================================================================
@@ -2341,6 +2341,19 @@ proc check_effective_target_arm_eabi { }
}]
}
+# Return 1 if this is an ARM target that adheres to the hard-float variant of
+# the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
+
+proc check_effective_target_arm_hf_eabi { } {
+ return [check_no_compiler_messages arm_hf_eabi object {
+ #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
+ #error not hard-float EABI
+ #else
+ int dummy;
+ #endif
+ }]
+}
+
# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
# Some multilibs may be incompatible with this option.
===================================================================
@@ -5,6 +5,8 @@
with pre-pushed arguments (e.g. SPARC). */
/* { dg-do run } */
+
+/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm_hf_eabi } } */
#define INTEGER_ARG 5