From patchwork Mon Feb 14 16:37:52 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nathan Froyd X-Patchwork-Id: 83124 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id C2BCEB71A4 for ; Tue, 15 Feb 2011 03:38:06 +1100 (EST) Received: (qmail 24708 invoked by alias); 14 Feb 2011 16:38:01 -0000 Received: (qmail 24463 invoked by uid 22791); 14 Feb 2011 16:37:59 -0000 X-SWARE-Spam-Status: No, hits=2.3 required=5.0 tests=AWL, BAYES_50, MEDICAL_SUBJECT, TW_FN, TW_XF, TW_XN, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 14 Feb 2011 16:37:54 +0000 Received: (qmail 22686 invoked from network); 14 Feb 2011 16:37:52 -0000 Received: from unknown (HELO localhost) (froydnj@127.0.0.2) by mail.codesourcery.com with ESMTPA; 14 Feb 2011 16:37:52 -0000 Date: Mon, 14 Feb 2011 08:37:52 -0800 From: Nathan Froyd To: gcc-patches@gcc.gnu.org Cc: nickc@redhat.com Subject: [PATCH] make iq2000 use constraints.md Message-ID: <20110214163752.GE6247@codesourcery.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.17+20080114 (2008-01-14) X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org As $SUBJECT suggests. Note that there are a number of define_register_constraints that don't correspond to cases handled by REG_CLASS_FROM_LETTER; they were required by iq2000.md, which contains a bunch of random class letters. I took the easy way out of defining null constraints, though I suppose one could argue that the constraints shouldn't be in iq2000.md in the first place. Tested with cross to iq2000-elf. OK to commit? -Nathan * config/iq2000/constraints.md: New file. * config/iq2000/iq2000.md: Include it. * config/iq2000/i2000.h (REG_CLASS_FROM_LETTER): Delete. (CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Delete. (EXTRA_CONSTRAINT): Delete. diff --git a/gcc/config/iq2000/constraints.md b/gcc/config/iq2000/constraints.md new file mode 100644 index 0000000..edd285f --- /dev/null +++ b/gcc/config/iq2000/constraints.md @@ -0,0 +1,97 @@ +;; Constraints for Vitesse IQ2000 processors +;; Copyright (C) 2011 Free Software Foundation, Inc. + +;; This file is part of GCC. + +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. + +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; . + +;; Register constraints. +(define_register_constraint "a" "NO_REGS" + "@internal") + +(define_register_constraint "b" "ALL_REGS" + "@internal") + +(define_register_constraint "d" "GR_REGS" + "@internal") + +(define_register_constraint "f" "NO_REGS" + "@internal") + +(define_register_constraint "S" "NO_REGS" + "@internal") + +(define_register_constraint "t" "NO_REGS" + "@internal") + +(define_register_constraint "x" "GR_REGS" + "@internal") + +(define_register_constraint "y" "GR_REGS" + "@internal") + +(define_register_constraint "z" "NO_REGS" + "@internal") + +;; Integer constraints. +(define_constraint "I" + "A 16-bit signed integer." + (and (match_code "const_int") + (match_test "IN_RANGE (ival, -32768, 32767)"))) + +(define_constraint "J" + "Zero." + (and (match_code "const_int") + (match_test "ival == 0"))) + +(define_constraint "K" + "A 16-bit unsigned integer" + (and (match_code "const_int") + (match_test "IN_RANGE (ival, 0, 65535)"))) + +(define_constraint "L" + "A 32-bit constant whose bottom 16 bits are zero." + (and (match_code "const_int") + (ior (match_test "(ival | 0x7fff0000) == 0x7fff0000") + (match_test "(ival | 0x7fff0000) + 0x10000 == 0")))) + +(define_constraint "M" + "Any constant not matched by 'I', 'K', or 'L'." + (and (match_code "const_int") + (match_test "!insn_const_int_ok_for_constraint (ival, CONSTRAINT_I)") + (match_test "!insn_const_int_ok_for_constraint (ival, CONSTRAINT_K)") + (match_test "!insn_const_int_ok_for_constraint (ival, CONSTRAINT_L)"))) + +(define_constraint "N" + "Any constant whose lower or upper 16 bits are 0xffff." + (and (match_code "const_int") + (ior (match_test "(ival & 0xffff) == 0xffff") + (match_test "(ival & 0xffff0000) == 0xffff0000")))) + +(define_constraint "O" + "A 5-bit signed integer." + (and (match_code "const_int") + (match_test "IN_RANGE (ival, -31, 31)"))) + +;; Floating-point constraints. +(define_constraint "G" + "Floating-point zero." + (and (match_code "const_double") + (match_test "op == CONST0_RTX (mode)"))) + +;; Extra constraints. +(define_constraint "R" + "A memory reference which takes one word for the instruction." + (match_test "simple_memory_operand (op, mode)")) diff --git a/gcc/config/iq2000/iq2000.h b/gcc/config/iq2000/iq2000.h index 95744b6..7f69d2a 100644 --- a/gcc/config/iq2000/iq2000.h +++ b/gcc/config/iq2000/iq2000.h @@ -235,12 +235,6 @@ enum reg_class #define INDEX_REG_CLASS NO_REGS -#define REG_CLASS_FROM_LETTER(C) \ - ((C) == 'd' ? GR_REGS : \ - (C) == 'b' ? ALL_REGS : \ - (C) == 'y' ? GR_REGS : \ - NO_REGS) - #define REGNO_OK_FOR_INDEX_P(regno) 0 #define PREFERRED_RELOAD_CLASS(X,CLASS) \ @@ -257,53 +251,6 @@ enum reg_class #define CLASS_MAX_NREGS(CLASS, MODE) \ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) -/* For IQ2000: - - `I' is used for the range of constants an arithmetic insn can - actually contain (16-bits signed integers). - - `J' is used for the range which is just zero (i.e., $r0). - - `K' is used for the range of constants a logical insn can actually - contain (16-bit zero-extended integers). - - `L' is used for the range of constants that be loaded with lui - (i.e., the bottom 16 bits are zero). - - `M' is used for the range of constants that take two words to load - (i.e., not matched by `I', `K', and `L'). - - `N' is used for constants 0xffffnnnn or 0xnnnnffff - - `O' is a 5-bit zero-extended integer. */ - -#define CONST_OK_FOR_LETTER_P(VALUE, C) \ - ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \ - : (C) == 'J' ? ((VALUE) == 0) \ - : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000) \ - : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0 \ - && (((VALUE) & ~2147483647) == 0 \ - || ((VALUE) & ~2147483647) == ~2147483647)) \ - : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \ - && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \ - && (((VALUE) & 0x0000ffff) != 0 \ - || (((VALUE) & ~2147483647) != 0 \ - && ((VALUE) & ~2147483647) != ~2147483647))) \ - : (C) == 'N' ? ((((VALUE) & 0xffff) == 0xffff) \ - || (((VALUE) & 0xffff0000) == 0xffff0000)) \ - : (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x20) < 0x40) \ - : 0) - -#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ - ((C) == 'G' \ - && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) - -/* `R' is for memory references which take 1 word for the instruction. */ - -#define EXTRA_CONSTRAINT(OP,CODE) \ - (((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \ - : FALSE) - /* Basic Stack Layout. */ diff --git a/gcc/config/iq2000/iq2000.md b/gcc/config/iq2000/iq2000.md index b7856c1..ad06378 100644 --- a/gcc/config/iq2000/iq2000.md +++ b/gcc/config/iq2000/iq2000.md @@ -194,6 +194,7 @@ (nil)]) (include "predicates.md") +(include "constraints.md") ;; .........................