From patchwork Fri Jan 28 02:14:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 80761 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 5531DB70E0 for ; Fri, 28 Jan 2011 13:14:54 +1100 (EST) Received: (qmail 7615 invoked by alias); 28 Jan 2011 02:14:52 -0000 Received: (qmail 7603 invoked by uid 22791); 28 Jan 2011 02:14:51 -0000 X-SWARE-Spam-Status: No, hits=-2.7 required=5.0 tests=AWL, BAYES_00, NO_DNS_FOR_FROM, RCVD_IN_DNSWL_HI, RISK_FREE, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mga01.intel.com (HELO mga01.intel.com) (192.55.52.88) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 28 Jan 2011 02:14:46 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 27 Jan 2011 18:14:44 -0800 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by fmsmga002.fm.intel.com with ESMTP; 27 Jan 2011 18:14:45 -0800 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id C7B86180932; Thu, 27 Jan 2011 18:14:44 -0800 (PST) Date: Thu, 27 Jan 2011 18:14:44 -0800 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Subject: PATCH: PR rtl-optimization/47502: Never combine asm statement Message-ID: <20110128021444.GA18059@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org It is a bad idea to combine asm statement. This patch disallows it. Any comments? Thanks. H.J. --- commit a11b95180e53d3a0bc3eabad5594859cea7c3334 Author: H.J. Lu Date: Thu Jan 27 18:12:27 2011 -0800 Never combine asm statement. diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32 index 0ae4761..ef65e7b 100644 --- a/gcc/ChangeLog.x32 +++ b/gcc/ChangeLog.x32 @@ -1,3 +1,8 @@ +2011-01-27 H.J. Lu + + PR rtl-optimization/47502 + * combine.c (cant_combine_insn_p): Never combine asm statement. + 2011-01-25 H.J. Lu PR target/47446 diff --git a/gcc/combine.c b/gcc/combine.c index 3ee53e6..d4a8079 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -2122,13 +2122,14 @@ cant_combine_insn_p (rtx insn) /* Never combine loads and stores involving hard regs that are likely to be spilled. The register allocator can usually handle such reg-reg moves by tying. If we allow the combiner to make - substitutions of likely-spilled regs, reload might die. + substitutions of likely-spilled regs, reload might die. Never + combine asm statement. As an exception, we allow combinations involving fixed regs; these are not available to the register allocator so there's no risk involved. */ set = single_set (insn); if (! set) - return 0; + return asm_noperands (PATTERN (insn)) > 0; src = SET_SRC (set); dest = SET_DEST (set); if (GET_CODE (src) == SUBREG) @@ -2144,7 +2145,7 @@ cant_combine_insn_p (rtx insn) && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (dest)))))) return 1; - return 0; + return asm_noperands (src) > 0; } struct likely_spilled_retval_info diff --git a/gcc/testsuite/ChangeLog.x32 b/gcc/testsuite/ChangeLog.x32 index 597294e..8759881 100644 --- a/gcc/testsuite/ChangeLog.x32 +++ b/gcc/testsuite/ChangeLog.x32 @@ -1,3 +1,9 @@ +2011-01-27 H.J. Lu + + PR rtl-optimization/47502 + * gcc.target/i386/pr47502-1.c: New. + * gcc.target/i386/pr47502-2.c: Likewise. + 2011-01-25 H.J. Lu PR target/47446 diff --git a/gcc/testsuite/gcc.target/i386/pr47502-1.c b/gcc/testsuite/gcc.target/i386/pr47502-1.c new file mode 100644 index 0000000..727afe9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr47502-1.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ + +void +foo (const void *xxxxx, void *yyyyy, long y) +{ + asm volatile ("" :: "c" ((xxxxx)), "d" ((yyyyy)), "S" (y)); +} diff --git a/gcc/testsuite/gcc.target/i386/pr47502-2.c b/gcc/testsuite/gcc.target/i386/pr47502-2.c new file mode 100644 index 0000000..1f57ea0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr47502-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int +foo (int how, const void *set, void *oset) +{ + int resultvar; + asm volatile ("" + : "=a" (resultvar) + : "0" (14) , "b" (how), "c" ((set)), "d" ((oset)), "S" (65 / 8) : "memory", "cc"); + return resultvar; +}