===================================================================
@@ -823,14 +823,19 @@
return NO_REGS;
}
-/* Implements CLASS_LIKELY_SPILLED_P. A_REGS is needed for address
+/* Implements TARGET_CLASS_LIKELY_SPILLED_P. A_REGS is needed for address
reloads. */
-int
-m32c_class_likely_spilled_p (int regclass)
+
+#undef TARGET_CLASS_LIKELY_SPILLED_P
+#define TARGET_CLASS_LIKELY_SPILLED_P m32c_class_likely_spilled_p
+
+static bool
+m32c_class_likely_spilled_p (reg_class_t regclass)
{
if (regclass == A_REGS)
- return 1;
- return reg_class_size[regclass] == 1;
+ return true;
+
+ return (reg_class_size[(int) regclass] == 1);
}
/* Implements CLASS_MAX_NREGS. We calculate this according to its
===================================================================
@@ -421,8 +421,6 @@
#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
-#define CLASS_LIKELY_SPILLED_P(C) m32c_class_likely_spilled_p (C)
-
#define CLASS_MAX_NREGS(C,M) m32c_class_max_nregs (C, M)
#define CANNOT_CHANGE_MODE_CLASS(F,T,C) m32c_cannot_change_mode_class(F,T,C)
===================================================================
@@ -22,7 +22,6 @@
#define MM enum machine_mode
#define UINT unsigned int
-int m32c_class_likely_spilled_p (int);
void m32c_conditional_register_usage (void);
int m32c_const_ok_for_constraint_p (HOST_WIDE_INT, char, const char *);
UINT m32c_dwarf_frame_regnum (int);