From patchwork Sun May 1 07:54:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleg Endo X-Patchwork-Id: 617152 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qyKTS24TNz9t4g for ; Sun, 1 May 2016 17:54:36 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=QTxQsMvh; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:date:content-type:mime-version; q= dns; s=default; b=OTb12sN5+QJIAEu4mTnloZSxK8gAhautiVKSve9e4tAwch WpdPHxTLEGMhhvN9Ar85t/FCWte/rG1gSvtA9Fsg7oq4apU3OKa+ju36ANb18K3+ 8eEzTtOAQYEoSvSme3HgH+MweJQ970BJ+jisSQ+lI+qF2JXXwkrP9jikTp7N4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:date:content-type:mime-version; s= default; bh=Lh/8XsTcEZiKgURRP+eya18peNM=; b=QTxQsMvhmE4U2WW/epji 1q189kLsXeNBDzs07b4eP3Nna5PwUQ6jaMPFduzxvNQ5n/8JcMjrug+3eT8tq8T+ EuJsf4NwYj8huV9/y2QI0zjT5tYevkaNrjpSusFiggqBWBbKaNB2rgSgNlz5Y88H Dl05VLHpwZ4IMJsDruM1PQY= Received: (qmail 72508 invoked by alias); 1 May 2016 07:54:27 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 72495 invoked by uid 89); 1 May 2016 07:54:25 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.0 required=5.0 tests=AWL, BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=H*M:101, H*MI:101, sk:ic_inva, 93108 X-HELO: mailout06.t-online.de Received: from mailout06.t-online.de (HELO mailout06.t-online.de) (194.25.134.19) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Sun, 01 May 2016 07:54:15 +0000 Received: from fwd30.aul.t-online.de (fwd30.aul.t-online.de [172.20.26.135]) by mailout06.t-online.de (Postfix) with SMTP id AD7065FAB5C for ; Sun, 1 May 2016 09:54:09 +0200 (CEST) Received: from [192.168.0.16] (SrndkYZfQhlUbWjqckE-5ikQxaZkUBV+-skVVw9PwMvULW-s8SwgFyWCPgFUqGRg5a@[115.165.93.200]) by fwd30.t-online.de with (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384 encrypted) esmtp id 1awmCb-3G5IPo0; Sun, 1 May 2016 09:54:05 +0200 Message-ID: <1462089242.31604.101.camel@t-online.de> Subject: [SH][committed] Remove constraints in expanders From: Oleg Endo To: gcc-patches Date: Sun, 01 May 2016 16:54:02 +0900 Mime-Version: 1.0 X-IsSubscribed: yes Hi, Constraints in expanders do nothing, so we can remove them. That's what the patch does. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"; Committed as r235691. Cheers, Oleg gcc/ChangeLog: * config/sh/sh.md (push, pop, ic_invalidate_line, cstoresi4, cstoredi4, cstoresf4, cstoredf4, fix_truncsfsi2): Remove constraints. diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 3af9644..bb97e2a 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -4969,10 +4969,10 @@ (define_expand "push" [(set (mem:SI (pre_dec:SI (reg:SI SP_REG))) - (match_operand:SI 0 "register_operand" "r,l,x"))]) + (match_operand:SI 0 "register_operand"))]) (define_expand "pop" - [(set (match_operand:SI 0 "register_operand" "=r,l,x") + [(set (match_operand:SI 0 "register_operand") (mem:SI (post_inc:SI (reg:SI SP_REG))))]) (define_expand "push_e" @@ -5323,7 +5323,7 @@ }) (define_expand "ic_invalidate_line" - [(parallel [(unspec_volatile [(match_operand:SI 0 "register_operand" "+r") + [(parallel [(unspec_volatile [(match_operand:SI 0 "register_operand") (match_dup 1)] UNSPEC_ICACHE) (clobber (scratch:SI))])] "TARGET_HARD_SH4" @@ -8158,10 +8158,10 @@ [(set_attr "type" "arith")]) (define_expand "cstoresi4" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand") (match_operator:SI 1 "comparison_operator" - [(match_operand:SI 2 "cmpsi_operand" "") - (match_operand:SI 3 "arith_operand" "")]))] + [(match_operand:SI 2 "cmpsi_operand") + (match_operand:SI 3 "arith_operand")]))] "TARGET_SH1" { if (sh_expand_t_scc (operands)) @@ -8175,10 +8175,10 @@ }) (define_expand "cstoredi4" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand") (match_operator:SI 1 "comparison_operator" - [(match_operand:DI 2 "arith_operand" "") - (match_operand:DI 3 "arith_operand" "")]))] + [(match_operand:DI 2 "arith_operand") + (match_operand:DI 3 "arith_operand")]))] "TARGET_SH2" { if (sh_expand_t_scc (operands)) @@ -8543,10 +8543,10 @@ (set_attr "length" "4")]) (define_expand "cstoresf4" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand") (match_operator:SI 1 "ordered_comparison_operator" - [(match_operand:SF 2 "arith_operand" "") - (match_operand:SF 3 "arith_operand" "")]))] + [(match_operand:SF 2 "arith_operand") + (match_operand:SF 3 "arith_operand")]))] "TARGET_SH2E" { if (! currently_expanding_to_rtl) @@ -8557,10 +8557,10 @@ }) (define_expand "cstoredf4" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand") (match_operator:SI 1 "ordered_comparison_operator" - [(match_operand:DF 2 "arith_operand" "") - (match_operand:DF 3 "arith_operand" "")]))] + [(match_operand:DF 2 "arith_operand") + (match_operand:DF 3 "arith_operand")]))] "TARGET_FPU_DOUBLE" { if (! currently_expanding_to_rtl) @@ -9310,8 +9310,8 @@ (set_attr "fp_mode" "single")]) (define_expand "fix_truncsfsi2" - [(set (match_operand:SI 0 "fpul_operand" "=y") - (fix:SI (match_operand:SF 1 "fp_arith_reg_operand" "f")))] + [(set (match_operand:SI 0 "fpul_operand") + (fix:SI (match_operand:SF 1 "fp_arith_reg_operand")))] "TARGET_SH2E" { emit_insn (gen_fix_truncsfsi2_i4 (operands[0], operands[1]));