@@ -338,6 +338,39 @@
(VR31_REGNUM 53)
])
+; Rounding modes for binary floating point numbers
+(define_constants
+ [(BFP_RND_CURRENT 0)
+ (BFP_RND_NEAREST_TIE_AWAY_FROM_0 1)
+ (BFP_RND_PREP_FOR_SHORT_PREC 3)
+ (BFP_RND_NEAREST_TIE_TO_EVEN 4)
+ (BFP_RND_TOWARD_0 5)
+ (BFP_RND_TOWARD_INF 6)
+ (BFP_RND_TOWARD_MINF 7)])
+
+; Rounding modes for decimal floating point numbers
+; 1-7 were introduced with the floating point extension facility
+; available with z196
+; With these rounding modes (1-7) a quantum exception might occur
+; which is suppressed for the other modes.
+(define_constants
+ [(DFP_RND_CURRENT 0)
+ (DFP_RND_NEAREST_TIE_AWAY_FROM_0_QUANTEXC 1)
+ (DFP_RND_CURRENT_QUANTEXC 2)
+ (DFP_RND_PREP_FOR_SHORT_PREC_QUANTEXC 3)
+ (DFP_RND_NEAREST_TIE_TO_EVEN_QUANTEXC 4)
+ (DFP_RND_TOWARD_0_QUANTEXC 5)
+ (DFP_RND_TOWARD_INF_QUANTEXC 6)
+ (DFP_RND_TOWARD_MINF_QUANTEXC 7)
+ (DFP_RND_NEAREST_TIE_TO_EVEN 8)
+ (DFP_RND_TOWARD_0 9)
+ (DFP_RND_TOWARD_INF 10)
+ (DFP_RND_TOWARD_MINF 11)
+ (DFP_RND_NEAREST_TIE_AWAY_FROM_0 12)
+ (DFP_RND_NEAREST_TIE_TO_0 13)
+ (DFP_RND_AWAY_FROM_0 14)
+ (DFP_RND_PREP_FOR_SHORT_PREC 15)])
+
;;
;; PFPO GPR0 argument format
;;
@@ -4482,7 +4515,7 @@
[(parallel
[(set (match_operand:DI 0 "register_operand" "")
(unsigned_fix:DI (match_operand:DD 1 "register_operand" "")))
- (unspec:DI [(const_int 5)] UNSPEC_ROUND)
+ (unspec:DI [(const_int DFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_DFP"
@@ -4507,11 +4540,13 @@
LT, NULL_RTX, VOIDmode, 0, label1);
emit_insn (gen_subtd3 (temp, temp,
const_double_from_real_value (sub, TDmode)));
- emit_insn (gen_fix_trunctddi2_dfp (operands[0], temp, GEN_INT (11)));
+ emit_insn (gen_fix_trunctddi2_dfp (operands[0], temp,
+ GEN_INT (DFP_RND_TOWARD_MINF)));
emit_jump (label2);
emit_label (label1);
- emit_insn (gen_fix_truncdddi2_dfp (operands[0], operands[1], GEN_INT (9)));
+ emit_insn (gen_fix_truncdddi2_dfp (operands[0], operands[1],
+ GEN_INT (DFP_RND_TOWARD_0)));
emit_label (label2);
DONE;
}
@@ -4521,7 +4556,7 @@
[(parallel
[(set (match_operand:DI 0 "register_operand" "")
(unsigned_fix:DI (match_operand:TD 1 "register_operand" "")))
- (unspec:DI [(const_int 5)] UNSPEC_ROUND)
+ (unspec:DI [(const_int DFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_DFP"
@@ -4542,11 +4577,13 @@
LT, NULL_RTX, VOIDmode, 0, label1);
emit_insn (gen_subtd3 (temp, operands[1],
const_double_from_real_value (sub, TDmode)));
- emit_insn (gen_fix_trunctddi2_dfp (operands[0], temp, GEN_INT (11)));
+ emit_insn (gen_fix_trunctddi2_dfp (operands[0], temp,
+ GEN_INT (DFP_RND_TOWARD_MINF)));
emit_jump (label2);
emit_label (label1);
- emit_insn (gen_fix_trunctddi2_dfp (operands[0], operands[1], GEN_INT (9)));
+ emit_insn (gen_fix_trunctddi2_dfp (operands[0], operands[1],
+ GEN_INT (DFP_RND_TOWARD_0)));
emit_label (label2);
DONE;
}
@@ -4561,7 +4598,7 @@
[(parallel
[(set (match_operand:GPR 0 "register_operand" "")
(unsigned_fix:GPR (match_operand:BFP 1 "register_operand" "")))
- (unspec:GPR [(const_int 5)] UNSPEC_ROUND)
+ (unspec:GPR [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT"
{
@@ -4582,12 +4619,12 @@
emit_insn (gen_sub<BFP:mode>3 (temp, operands[1],
const_double_from_real_value (sub, <BFP:MODE>mode)));
emit_insn (gen_fix_trunc<BFP:mode><GPR:mode>2_bfp (operands[0], temp,
- GEN_INT (7)));
+ GEN_INT (BFP_RND_TOWARD_MINF)));
emit_jump (label2);
emit_label (label1);
emit_insn (gen_fix_trunc<BFP:mode><GPR:mode>2_bfp (operands[0],
- operands[1], GEN_INT (5)));
+ operands[1], GEN_INT (BFP_RND_TOWARD_0)));
emit_label (label2);
DONE;
}
@@ -4598,7 +4635,7 @@
[(parallel
[(set (match_operand:SI 0 "register_operand" "")
(unsigned_fix:SI (match_operand:DFP 1 "register_operand" "")))
- (unspec:SI [(const_int 5)] UNSPEC_ROUND)
+ (unspec:SI [(const_int DFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_Z196 && TARGET_HARD_DFP"
"")
@@ -4636,7 +4673,7 @@
"TARGET_HARD_FLOAT"
{
emit_insn (gen_fix_trunc<DSF:mode><GPR:mode>2_bfp (operands[0], operands[1],
- GEN_INT (5)));
+ GEN_INT (BFP_RND_TOWARD_0)));
DONE;
})
@@ -4682,7 +4719,7 @@
{
operands[1] = force_reg (<MODE>mode, operands[1]);
emit_insn (gen_fix_trunc<mode>di2_dfp (operands[0], operands[1],
- GEN_INT (9)));
+ GEN_INT (DFP_RND_TOWARD_0)));
DONE;
})
@@ -4705,7 +4742,7 @@
(define_expand "fix_trunctf<mode>2"
[(parallel [(set (match_operand:GPR 0 "register_operand" "")
(fix:GPR (match_operand:TF 1 "register_operand" "")))
- (unspec:GPR [(const_int 5)] UNSPEC_ROUND)
+ (unspec:GPR [(const_int BFP_RND_TOWARD_0)] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT"
"")
This patch replaces a few magic numbers used for floating point rounding modes with macros. This is mostly a NoOp change apart from: fixuns_truncdddi2, fixuns_trunctddi2, fixuns_trunc<mode>si2: Replace 5 with DFP_RND_TOWARD_0 (which is 9). 5 as well as 9 represent round towards 0 with the difference that for 5 the new DFP quantum exception is enabled as well. This exception isn't IEEE754 and we do not have an interface to enable and test it anyway. So we do not intend to enable it. This so far should not have any noticable effect since the quantum exception was not observable through the Posix functions. Some pattern ("fix_trunc<mode>di2") is already using rounding mode 9 correctly. gcc/ChangeLog: 2016-03-08 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/s390.md (BFP_RND_*, DFP_RND_*): Add new constant definitions for BFP and DFP rounding modes. ("fixuns_truncdddi2", "fixuns_trunctddi2") ("fixuns_trunc<BFP:mode><GPR:mode>2", "fixuns_trunc<mode>si2") ("fix_trunc<DSF:mode><GPR:mode>2", "fix_trunc<mode>di2") ("fix_trunctf<mode>2"): Use the new constants instead of magic numbers. --- gcc/config/s390/s390.md | 63 +++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 50 insertions(+), 13 deletions(-)