From patchwork Tue Sep 15 09:14:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Lawrence X-Patchwork-Id: 517754 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id EFA591402B8 for ; Tue, 15 Sep 2015 19:17:02 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=IyR4W0b9; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :content-type:content-transfer-encoding; q=dns; s=default; b=Rdd Te3q/Ln+vYE7xBQ6osxuszvwhGKLOIe0qr+9RVJqSy0breelF3oHBZTNR1DypWRB rQqymFmYCiwBEZ3oi7P62ptCET+hGDBL9ESNbf2trv0n5NvilkS9gM2YTL/yTYCz J56jCSEVFVjvSVLdIL9/9lm4LJXlnMsJxpmBagmI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :content-type:content-transfer-encoding; s=default; bh=7HRLjYFt8 IQImKqeME3LzxLrlgE=; b=IyR4W0b9X8BGlH/UH5sIerISiWxOxMF9JrCOPv8Q1 DvSltB2LQCNjnt5UP0k1PdVPem3IKpohc9SvcbpaG95JfJcwDfDTRFkHDKoM7gdH 0/aAX9wxcMSWbIXM9+ia3XSQoAA18M5PNqw+Zc2+SCCg+gut1HagbOHhU2G68loR TE= Received: (qmail 51990 invoked by alias); 15 Sep 2015 09:16:14 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 51925 invoked by uid 89); 15 Sep 2015 09:16:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.0 required=5.0 tests=AWL, BAYES_00, SPF_SOFTFAIL, UNWANTED_LANGUAGE_BODY autolearn=no version=3.3.2 X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (208.118.235.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Tue, 15 Sep 2015 09:16:12 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZbmLO-0002oF-VB for gcc-patches@gcc.gnu.org; Tue, 15 Sep 2015 05:16:10 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]:51469) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbmLO-0002nv-FW for gcc-patches@gcc.gnu.org; Tue, 15 Sep 2015 05:16:06 -0400 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-24-6-3BoxNHSeOrfISc9m4BUQ-9; Tue, 15 Sep 2015 10:14:57 +0100 Received: from arm.com ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 15 Sep 2015 10:14:54 +0100 From: Alan Lawrence To: gcc-patches@gcc.gnu.org Cc: james.greenhalgh@arm.com Subject: [PATCH][AArch64 array_mode 4/8] Remove EImode Date: Tue, 15 Sep 2015 10:14:39 +0100 Message-Id: <1442308483-21714-5-git-send-email-alan.lawrence@arm.com> In-Reply-To: <1442308483-21714-1-git-send-email-alan.lawrence@arm.com> References: <1440596819-18018-1-git-send-email-alan.lawrence@arm.com> <1442308483-21714-1-git-send-email-alan.lawrence@arm.com> X-MC-Unique: 6-3BoxNHSeOrfISc9m4BUQ-9 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 146.101.78.143 X-IsSubscribed: yes This removes EImode from the (AArch64) compiler, and all mention of or support for it. bootstrapped and check-gcc on aarch64-none-linux-gnu gcc/ChangeLog: * config/aarch64/aarch64.c (aarch64_simd_attr_length_rglist): Update comment. * config/aarch64/aarch64-builtins.c (ei_UP, aarch64_simd_intEI_type_node): Remove. (aarch64_simd_builtin_std_type): Remove EImode case. (aarch64_init_simd_builtin_types): Don't create/add intEI_type_node. * config/aarch64/aarch64-modes.def: Remove EImode. --- gcc/config/aarch64/aarch64-builtins.c | 8 -------- gcc/config/aarch64/aarch64-modes.def | 5 ++--- gcc/config/aarch64/aarch64.c | 2 +- 3 files changed, 3 insertions(+), 12 deletions(-) diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 5a04263..c86f47d 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -75,7 +75,6 @@ #define v2di_UP V2DImode #define v2df_UP V2DFmode #define ti_UP TImode -#define ei_UP EImode #define oi_UP OImode #define ci_UP CImode #define xi_UP XImode @@ -449,7 +448,6 @@ static struct aarch64_simd_type_info aarch64_simd_types [] = { static tree aarch64_fp16_type_node = NULL_TREE; static tree aarch64_simd_intOI_type_node = NULL_TREE; -static tree aarch64_simd_intEI_type_node = NULL_TREE; static tree aarch64_simd_intCI_type_node = NULL_TREE; static tree aarch64_simd_intXI_type_node = NULL_TREE; @@ -523,8 +521,6 @@ aarch64_simd_builtin_std_type (enum machine_mode mode, return QUAL_TYPE (TI); case OImode: return aarch64_simd_intOI_type_node; - case EImode: - return aarch64_simd_intEI_type_node; case CImode: return aarch64_simd_intCI_type_node; case XImode: @@ -641,15 +637,11 @@ aarch64_init_simd_builtin_types (void) #define AARCH64_BUILD_SIGNED_TYPE(mode) \ make_signed_type (GET_MODE_PRECISION (mode)); aarch64_simd_intOI_type_node = AARCH64_BUILD_SIGNED_TYPE (OImode); - aarch64_simd_intEI_type_node = AARCH64_BUILD_SIGNED_TYPE (EImode); aarch64_simd_intCI_type_node = AARCH64_BUILD_SIGNED_TYPE (CImode); aarch64_simd_intXI_type_node = AARCH64_BUILD_SIGNED_TYPE (XImode); #undef AARCH64_BUILD_SIGNED_TYPE tdecl = add_builtin_type - ("__builtin_aarch64_simd_ei" , aarch64_simd_intEI_type_node); - TYPE_NAME (aarch64_simd_intEI_type_node) = tdecl; - tdecl = add_builtin_type ("__builtin_aarch64_simd_oi" , aarch64_simd_intOI_type_node); TYPE_NAME (aarch64_simd_intOI_type_node) = tdecl; tdecl = add_builtin_type diff --git a/gcc/config/aarch64/aarch64-modes.def b/gcc/config/aarch64/aarch64-modes.def index 3160bef..3bf3b2d 100644 --- a/gcc/config/aarch64/aarch64-modes.def +++ b/gcc/config/aarch64/aarch64-modes.def @@ -50,9 +50,8 @@ VECTOR_MODE (FLOAT, DF, 1); /* V1DF. */ /* Oct Int: 256-bit integer mode needed for 32-byte vector arguments. */ INT_MODE (OI, 32); -/* Opaque integer modes for 3, 6 or 8 Neon double registers (2 is - TImode). */ -INT_MODE (EI, 24); +/* Opaque integer modes for 3 or 4 Neon q-registers / 6 or 8 Neon d-registers + (2 d-regs = 1 q-reg = TImode). */ INT_MODE (CI, 48); INT_MODE (XI, 64); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index b2a481b..0d36ee5 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -10476,7 +10476,7 @@ aarch64_simd_attr_length_move (rtx_insn *insn) } /* Compute and return the length of aarch64_simd_reglist, where is - one of VSTRUCT modes: OI, CI, EI, or XI. */ + one of VSTRUCT modes: OI, CI, or XI. */ int aarch64_simd_attr_length_rglist (enum machine_mode mode) {