From patchwork Wed Aug 26 13:46:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Lawrence X-Patchwork-Id: 510873 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B7B031401F0 for ; Wed, 26 Aug 2015 23:47:50 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=inVswXoq; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=CswFxg6CiWihKFbsxa5ZAWBJ2GQd1S3UmfxZHY6UvYqye9cGAMFSY wf8XvaWm5D2vSwiwofqbTfeOADgQ5Fbj2Qe74rcniWQ3O2zlwjheuR6C5E0TdUxg cwVkeWiGVQ5diA0N+zLOzluX+ayh3nFUle2ihKyCuhKnP5RjabwVog= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=KMOFI6x4xDNwJwQynyez5C+Vjg0=; b=inVswXoqaD4oOutN/1zI 8xeFy7vcnmXPlqu+M3kZinhcbHBw8Y0a9QFaAcEZnO7O8b/EpcJW+eT51Vng33qH ry1VGtmAE4mvcorHYyZEMKr/OYN+tE2wTHJ7iKQsQmLflQUUjDQwl89FRkO7xY7x Obve8Mdq/sQoEzpxdyTNx+Y= Received: (qmail 38326 invoked by alias); 26 Aug 2015 13:47:14 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 38206 invoked by uid 89); 26 Aug 2015 13:47:12 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00, KAM_LAZY_DOMAIN_SECURITY, NO_DNS_FOR_FROM, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: cam-smtp0.cambridge.arm.com Received: from fw-tnat.cambridge.arm.com (HELO cam-smtp0.cambridge.arm.com) (217.140.96.140) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Wed, 26 Aug 2015 13:47:11 +0000 Received: from e104536-lin.cambridge.arm.com (e104536-lin.cambridge.arm.com [10.2.207.65]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id t7QDl7Zb025846; Wed, 26 Aug 2015 14:47:07 +0100 Received: from e104536-lin.cambridge.arm.com (localhost [127.0.0.1]) by e104536-lin.cambridge.arm.com (8.13.8/8.11.6) with ESMTP id t7QDl7ZM018100; Wed, 26 Aug 2015 14:47:07 +0100 Received: (from alalaw01@localhost) by e104536-lin.cambridge.arm.com (8.13.8/8.13.8/Submit) id t7QDl7Be018099; Wed, 26 Aug 2015 14:47:07 +0100 From: Alan Lawrence To: gcc-patches@gcc.gnu.org Cc: james.greenhalgh@arm.com, marcus.shawcroft@arm.com Subject: [PATCH][AArch64 array_mode 4/8] Remove EImode Date: Wed, 26 Aug 2015 14:46:55 +0100 Message-Id: <1440596819-18018-5-git-send-email-alan.lawrence@arm.com> In-Reply-To: <1440596819-18018-1-git-send-email-alan.lawrence@arm.com> References: <1440596819-18018-1-git-send-email-alan.lawrence@arm.com> X-IsSubscribed: yes This removes EImode from the (AArch64) compiler, and all mention of or support for it. bootstrapped and check-gcc on aarch64-none-linux-gnu gcc/ChangeLog: * config/aarch64/aarch64.c (aarch64_simd_attr_length_rglist): Update comment. * config/aarch64/aarch64-builtins.c (ei_UP, aarch64_simd_intEI_type_node): Remove. (aarch64_simd_builtin_std_type): Remove EImode case. (aarch64_init_simd_builtin_types): Don't create/add intEI_type_node. * config/aarch64/aarch64-modes.def: Remove EImode. --- gcc/config/aarch64/aarch64-builtins.c | 8 -------- gcc/config/aarch64/aarch64-modes.def | 5 ++--- gcc/config/aarch64/aarch64.c | 2 +- 3 files changed, 3 insertions(+), 12 deletions(-) diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 294bf9d..9c8ca3b 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -73,7 +73,6 @@ #define v2di_UP V2DImode #define v2df_UP V2DFmode #define ti_UP TImode -#define ei_UP EImode #define oi_UP OImode #define ci_UP CImode #define xi_UP XImode @@ -435,7 +434,6 @@ static struct aarch64_simd_type_info aarch64_simd_types [] = { #undef ENTRY static tree aarch64_simd_intOI_type_node = NULL_TREE; -static tree aarch64_simd_intEI_type_node = NULL_TREE; static tree aarch64_simd_intCI_type_node = NULL_TREE; static tree aarch64_simd_intXI_type_node = NULL_TREE; @@ -509,8 +507,6 @@ aarch64_simd_builtin_std_type (enum machine_mode mode, return QUAL_TYPE (TI); case OImode: return aarch64_simd_intOI_type_node; - case EImode: - return aarch64_simd_intEI_type_node; case CImode: return aarch64_simd_intCI_type_node; case XImode: @@ -623,15 +619,11 @@ aarch64_init_simd_builtin_types (void) #define AARCH64_BUILD_SIGNED_TYPE(mode) \ make_signed_type (GET_MODE_PRECISION (mode)); aarch64_simd_intOI_type_node = AARCH64_BUILD_SIGNED_TYPE (OImode); - aarch64_simd_intEI_type_node = AARCH64_BUILD_SIGNED_TYPE (EImode); aarch64_simd_intCI_type_node = AARCH64_BUILD_SIGNED_TYPE (CImode); aarch64_simd_intXI_type_node = AARCH64_BUILD_SIGNED_TYPE (XImode); #undef AARCH64_BUILD_SIGNED_TYPE tdecl = add_builtin_type - ("__builtin_aarch64_simd_ei" , aarch64_simd_intEI_type_node); - TYPE_NAME (aarch64_simd_intEI_type_node) = tdecl; - tdecl = add_builtin_type ("__builtin_aarch64_simd_oi" , aarch64_simd_intOI_type_node); TYPE_NAME (aarch64_simd_intOI_type_node) = tdecl; tdecl = add_builtin_type diff --git a/gcc/config/aarch64/aarch64-modes.def b/gcc/config/aarch64/aarch64-modes.def index b17b90d..653bd00 100644 --- a/gcc/config/aarch64/aarch64-modes.def +++ b/gcc/config/aarch64/aarch64-modes.def @@ -46,9 +46,8 @@ VECTOR_MODE (FLOAT, DF, 1); /* V1DF. */ /* Oct Int: 256-bit integer mode needed for 32-byte vector arguments. */ INT_MODE (OI, 32); -/* Opaque integer modes for 3, 6 or 8 Neon double registers (2 is - TImode). */ -INT_MODE (EI, 24); +/* Opaque integer modes for 3 or 4 Neon q-registers / 6 or 8 Neon d-registers + (2 d-regs = 1 q-reg = TImode). */ INT_MODE (CI, 48); INT_MODE (XI, 64); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 020f63c..a923b55 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -9305,7 +9305,7 @@ aarch64_simd_attr_length_move (rtx_insn *insn) } /* Compute and return the length of aarch64_simd_reglist, where is - one of VSTRUCT modes: OI, CI, EI, or XI. */ + one of VSTRUCT modes: OI, CI, or XI. */ int aarch64_simd_attr_length_rglist (enum machine_mode mode) {