@@ -42,7 +42,10 @@ EXPORTED_CONST int processor_flags_table[] =
/* z196 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
| PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196,
/* zEC12 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
+ | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX,
+ /* z13 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
| PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
+ | PF_Z13 | PF_VX
};
/* Change optimizations to be performed, depending on the
@@ -4071,7 +4071,7 @@ case "${target}" in
for which in arch tune; do
eval "val=\$with_$which"
case ${val} in
- "" | g5 | g6 | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12)
+ "" | g5 | g6 | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13)
# OK
;;
*)
@@ -35,6 +35,7 @@ enum processor_type
PROCESSOR_2097_Z10,
PROCESSOR_2817_Z196,
PROCESSOR_2827_ZEC12,
+ PROCESSOR_2964_Z13,
PROCESSOR_max
};
@@ -5851,7 +5851,8 @@ s390_adjust_priority (rtx_insn *insn, int priority)
&& s390_tune != PROCESSOR_2094_Z9_109
&& s390_tune != PROCESSOR_2097_Z10
&& s390_tune != PROCESSOR_2817_Z196
- && s390_tune != PROCESSOR_2827_ZEC12)
+ && s390_tune != PROCESSOR_2827_ZEC12
+ && s390_tune != PROCESSOR_2964_Z13)
return priority;
switch (s390_safe_attr_type (insn))
@@ -11451,7 +11452,8 @@ s390_reorg (void)
/* Walk over the insns and do some >=z10 specific changes. */
if (s390_tune == PROCESSOR_2097_Z10
|| s390_tune == PROCESSOR_2817_Z196
- || s390_tune == PROCESSOR_2827_ZEC12)
+ || s390_tune == PROCESSOR_2827_ZEC12
+ || s390_tune == PROCESSOR_2964_Z13)
{
rtx_insn *insn;
bool insn_added_p = false;
@@ -11700,7 +11702,8 @@ s390_sched_reorder (FILE *file, int verbose,
if (reload_completed && *nreadyp > 1)
s390_z10_prevent_earlyload_conflicts (ready, nreadyp);
- if (s390_tune == PROCESSOR_2827_ZEC12
+ if ((s390_tune == PROCESSOR_2827_ZEC12
+ || s390_tune == PROCESSOR_2964_Z13)
&& reload_completed
&& *nreadyp > 1)
{
@@ -11783,7 +11786,8 @@ s390_sched_variable_issue (FILE *file, int verbose, rtx_insn *insn, int more)
{
last_scheduled_insn = insn;
- if (s390_tune == PROCESSOR_2827_ZEC12
+ if ((s390_tune == PROCESSOR_2827_ZEC12
+ || s390_tune == PROCESSOR_2964_Z13)
&& reload_completed
&& recog_memoized (insn) >= 0)
{
@@ -11863,7 +11867,8 @@ s390_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
if (s390_tune != PROCESSOR_2097_Z10
&& s390_tune != PROCESSOR_2817_Z196
- && s390_tune != PROCESSOR_2827_ZEC12)
+ && s390_tune != PROCESSOR_2827_ZEC12
+ && s390_tune != PROCESSOR_2964_Z13)
return nunroll;
/* Count the number of memory references within the loop body. */
@@ -11994,6 +11999,22 @@ s390_option_override (void)
if (!(target_flags_explicit & MASK_OPT_HTM) && TARGET_CPU_HTM && TARGET_ZARCH)
target_flags |= MASK_OPT_HTM;
+ if (target_flags_explicit & MASK_OPT_VX)
+ {
+ if (TARGET_OPT_VX)
+ {
+ if (!TARGET_CPU_VX)
+ error ("hardware vector support not available on %s",
+ s390_arch_string);
+ if (TARGET_SOFT_FLOAT)
+ error ("hardware vector support not available with -msoft-float");
+ }
+ }
+ else if (TARGET_CPU_VX)
+ /* Enable vector support if available and not explicitly disabled
+ by user. E.g. with -m31 -march=z13 -mzarch */
+ target_flags |= MASK_OPT_VX;
+
if (TARGET_HARD_DFP && !TARGET_DFP)
{
if (target_flags_explicit & MASK_HARD_DFP)
@@ -12033,6 +12054,7 @@ s390_option_override (void)
s390_cost = &z196_cost;
break;
case PROCESSOR_2827_ZEC12:
+ case PROCESSOR_2964_Z13:
s390_cost = &zEC12_cost;
break;
default:
@@ -12060,7 +12082,8 @@ s390_option_override (void)
if (s390_tune == PROCESSOR_2097_Z10
|| s390_tune == PROCESSOR_2817_Z196
- || s390_tune == PROCESSOR_2827_ZEC12)
+ || s390_tune == PROCESSOR_2827_ZEC12
+ || s390_tune == PROCESSOR_2964_Z13)
{
maybe_set_param_value (PARAM_MAX_UNROLLED_INSNS, 100,
global_options.x_param_values,
@@ -35,7 +35,9 @@ enum processor_flags
PF_Z10 = 32,
PF_Z196 = 64,
PF_ZEC12 = 128,
- PF_TX = 256
+ PF_TX = 256,
+ PF_Z13 = 512,
+ PF_VX = 1024
};
/* This is necessary to avoid a warning about comparing different enum
@@ -64,6 +66,10 @@ enum processor_flags
(s390_arch_flags & PF_ZEC12)
#define TARGET_CPU_HTM \
(s390_arch_flags & PF_TX)
+#define TARGET_CPU_Z13 \
+ (s390_arch_flags & PF_Z13)
+#define TARGET_CPU_VX \
+ (s390_arch_flags & PF_VX)
/* These flags indicate that the generated code should run on a cpu
providing the respective hardware facility when run in
@@ -82,7 +88,15 @@ enum processor_flags
#define TARGET_ZEC12 \
(TARGET_ZARCH && TARGET_CPU_ZEC12)
#define TARGET_HTM (TARGET_OPT_HTM)
+#define TARGET_Z13 \
+ (TARGET_ZARCH && TARGET_CPU_Z13)
+#define TARGET_VX \
+ (TARGET_ZARCH && TARGET_CPU_VX && TARGET_OPT_VX && TARGET_HARD_FLOAT)
+/* Use the ABI introduced with IBM z13:
+ - pass vector arguments <= 16 bytes in VRs
+ - align *all* vector types to 8 bytes */
+#define TARGET_VX_ABI TARGET_VX
#define TARGET_AVOID_CMP_AND_BRANCH (s390_tune == PROCESSOR_2817_Z196)
@@ -115,7 +129,8 @@ enum processor_flags
while (0)
#ifdef DEFAULT_TARGET_64BIT
-#define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP | MASK_OPT_HTM)
+#define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \
+ | MASK_OPT_HTM | MASK_OPT_VX)
#else
#define TARGET_DEFAULT 0
#endif
@@ -324,11 +324,11 @@
;; distinguish between g5 and g6, but there are differences between the two
;; CPUs could in theory be modeled.
-(define_attr "cpu" "g5,g6,z900,z990,z9_109,z9_ec,z10,z196,zEC12"
+(define_attr "cpu" "g5,g6,z900,z990,z9_109,z9_ec,z10,z196,zEC12,z13"
(const (symbol_ref "s390_tune_attr")))
(define_attr "cpu_facility"
- "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12"
+ "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vec"
(const_string "standard"))
(define_attr "enabled" ""
@@ -369,6 +369,10 @@
(and (eq_attr "cpu_facility" "zEC12")
(match_test "TARGET_ZEC12"))
+ (const_int 1)
+
+ (and (eq_attr "cpu_facility" "vec")
+ (match_test "TARGET_VX"))
(const_int 1)]
(const_int 0)))
@@ -76,6 +76,9 @@ Enum(processor_type) String(z196) Value(PROCESSOR_2817_Z196)
EnumValue
Enum(processor_type) String(zEC12) Value(PROCESSOR_2827_ZEC12)
+EnumValue
+Enum(processor_type) String(z13) Value(PROCESSOR_2964_Z13)
+
mbackchain
Target Report Mask(BACKCHAIN)
Maintain backchain pointer
@@ -118,6 +121,10 @@ mhtm
Target Report Mask(OPT_HTM)
Use hardware transactional execution instructions
+mvx
+Target Report Mask(OPT_VX)
+Use hardware vector facility instructions and enable the vector ABI
+
mpacked-stack
Target Report Mask(PACKED_STACK)
Use packed stack layout