From patchwork Thu Apr 16 21:46:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bill Schmidt X-Patchwork-Id: 461853 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B195A140291 for ; Fri, 17 Apr 2015 07:46:29 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass reason="1024-bit key; unprotected key" header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=CWFnbr3C; dkim-adsp=none (unprotected policy); dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:cc:date:content-type:mime-version :content-transfer-encoding; q=dns; s=default; b=vq0A1worq3RmpWi4 NN5Yad6gK0izVaOcmNbccaT3QtPFvcTXQ3Q9BkHodas4sOUjxsAHUUYvYZbJPjwg vif/IkZhffOzacmbnwkgZYNlq+baKSGQCiXUF4Q6ZH9iuxMRBh4TkhpV2X6mW1CB fu4t16a4ZmVhzNRB97SweLONwtE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:cc:date:content-type:mime-version :content-transfer-encoding; s=default; bh=OEXh6HX95YLH/sIUPTjoeQ 09RTE=; b=CWFnbr3CjNLDaMduceMCrU2Da1+Guzfupth/QcKFbjuxshfh95t0nE HT6GzB9gtlKG/AmCp2LSzCeg/gNUILIxUnYupxlOgXGvDsGwxvQitaiB8QsbY00B OAQp1kXUTXHktJ9qVIy2pBjiPvBAU+pN7FZkgZsGETSrRfHLPkNQk= Received: (qmail 108229 invoked by alias); 16 Apr 2015 21:46:21 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 108219 invoked by uid 89); 16 Apr 2015 21:46:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.6 required=5.0 tests=AWL, BAYES_00, KAM_ASCII_DIVIDERS, KAM_LAZY_DOMAIN_SECURITY, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: e9.ny.us.ibm.com Received: from e9.ny.us.ibm.com (HELO e9.ny.us.ibm.com) (32.97.182.139) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Thu, 16 Apr 2015 21:46:19 +0000 Received: from /spool/local by e9.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 16 Apr 2015 17:46:17 -0400 Received: from b01cxnp23033.gho.pok.ibm.com (b01cxnp23033.gho.pok.ibm.com [9.57.198.28]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id 73F1BC90043 for ; Thu, 16 Apr 2015 17:37:25 -0400 (EDT) Received: from d01av01.pok.ibm.com (d01av01.pok.ibm.com [9.56.224.215]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t3GLkGSs49348648 for ; Thu, 16 Apr 2015 21:46:16 GMT Received: from d01av01.pok.ibm.com (localhost [127.0.0.1]) by d01av01.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t3GLkGkL016894 for ; Thu, 16 Apr 2015 17:46:16 -0400 Received: from [9.65.140.82] (sig-9-65-140-82.ibm.com [9.65.140.82]) by d01av01.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t3GLkELk016817; Thu, 16 Apr 2015 17:46:15 -0400 Message-ID: <1429220775.20720.4.camel@gnopaine> Subject: [PATCH, 5.1, rs6000] Fix PR65787 From: Bill Schmidt To: gcc-patches@gcc.gnu.org Cc: dje.gcc@gmail.com Date: Thu, 16 Apr 2015 16:46:15 -0500 Mime-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15041621-0033-0000-0000-00000249C9B6 X-IsSubscribed: yes Hi, https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65787 identifies an issue where the powerpc64le vector swap optimization miscompiles some code. The code for handling vector extract operations did not expect to find those operations wrapped in a PARALLEL with a CLOBBER, but this test shows that this can now happen. This patch adds that possibility to the handling for vector extract. I've added a small test case to verify that we now catch this. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this ok for trunk and gcc-5-branch? After this is complete I will investigate whether we need to backport this to 4.8 and 4.9 also. Thanks, Bill [gcc] 2015-04-16 Bill Schmidt PR target/65787 * config/rs6000/rs6000.c (rtx_is_swappable_p): Handle case where vec_extract operation is wrapped in a PARALLEL with a CLOBBER. (adjust_extract): Likewise. [gcc/testsuite] 2015-04-16 Bill Schmidt PR target/65787 * gcc.target/powerpc/pr65787.c: New. Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 222158) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -34204,6 +34204,20 @@ rtx_is_swappable_p (rtx op, unsigned int *special) else return 0; + case PARALLEL: { + /* A vec_extract operation may be wrapped in a PARALLEL with a + clobber, so account for that possibility. */ + unsigned int len = XVECLEN (op, 0); + + if (len != 2) + return 0; + + if (GET_CODE (XVECEXP (op, 0, 1)) != CLOBBER) + return 0; + + return rtx_is_swappable_p (XVECEXP (op, 0, 0), special); + } + case UNSPEC: { /* Various operations are unsafe for this optimization, at least @@ -34603,7 +34617,10 @@ permute_store (rtx_insn *insn) static void adjust_extract (rtx_insn *insn) { - rtx src = SET_SRC (PATTERN (insn)); + rtx pattern = PATTERN (insn); + if (GET_CODE (pattern) == PARALLEL) + pattern = XVECEXP (pattern, 0, 0); + rtx src = SET_SRC (pattern); /* The vec_select may be wrapped in a vec_duplicate for a splat, so account for that. */ rtx sel = GET_CODE (src) == VEC_DUPLICATE ? XEXP (src, 0) : src; Index: gcc/testsuite/gcc.target/powerpc/pr65787.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/pr65787.c (revision 0) +++ gcc/testsuite/gcc.target/powerpc/pr65787.c (working copy) @@ -0,0 +1,21 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "xxsldwi \[0-9\]*,\[0-9\]*,\[0-9\]*,3" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +/* This test verifies that a vector extract operand properly has its + lane changed by the swap optimization. Element 2 of LE corresponds + to element 1 of BE. When doublewords are swapped, this becomes + element 3 of BE, so we need to shift the vector left by 3 words + to be able to extract the correct value from BE element zero. */ + +typedef float v4f32 __attribute__ ((__vector_size__ (16))); + +void foo (float); +extern v4f32 x, y; + +int main() { + v4f32 z = x + y; + foo (z[2]); +}