===================================================================
@@ -2455,7 +2455,7 @@
}
})
-(define_insn "*altivec_lvx_<mode>_internal"
+(define_insn "altivec_lvx_<mode>_internal"
[(parallel
[(set (match_operand:VM2 0 "register_operand" "=v")
(match_operand:VM2 1 "memory_operand" "Z"))
@@ -2478,7 +2478,7 @@
}
})
-(define_insn "*altivec_stvx_<mode>_internal"
+(define_insn "altivec_stvx_<mode>_internal"
[(parallel
[(set (match_operand:VM2 0 "memory_operand" "=Z")
(match_operand:VM2 1 "register_operand" "v"))
===================================================================
@@ -22738,7 +22738,7 @@ output_probe_stack_range (rtx reg1, rtx reg2)
static rtx
rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE_INT val,
- rtx reg2, rtx rreg, rtx split_reg)
+ rtx reg2, rtx rreg)
{
rtx real, temp;
@@ -22829,11 +22829,6 @@ rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE
}
}
- /* If a store insn has been split into multiple insns, the
- true source register is given by split_reg. */
- if (split_reg != NULL_RTX)
- real = gen_rtx_SET (VOIDmode, SET_DEST (real), split_reg);
-
RTX_FRAME_RELATED_P (insn) = 1;
add_reg_note (insn, REG_FRAME_RELATED_EXPR, real);
@@ -22941,7 +22936,7 @@ emit_frame_save (rtx frame_reg, machine_mode mode,
reg = gen_rtx_REG (mode, regno);
insn = emit_insn (gen_frame_store (reg, frame_reg, offset));
return rs6000_frame_related (insn, frame_reg, frame_reg_to_sp,
- NULL_RTX, NULL_RTX, NULL_RTX);
+ NULL_RTX, NULL_RTX);
}
/* Emit an offset memory reference suitable for a frame store, while
@@ -23521,7 +23516,7 @@ rs6000_emit_prologue (void)
insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
- treg, GEN_INT (-info->total_size), NULL_RTX);
+ treg, GEN_INT (-info->total_size));
sp_off = frame_off = info->total_size;
}
@@ -23606,7 +23601,7 @@ rs6000_emit_prologue (void)
insn = emit_move_insn (mem, reg);
rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
- NULL_RTX, NULL_RTX, NULL_RTX);
+ NULL_RTX, NULL_RTX);
END_USE (0);
}
}
@@ -23662,7 +23657,7 @@ rs6000_emit_prologue (void)
info->lr_save_offset,
DFmode, sel);
rs6000_frame_related (insn, ptr_reg, sp_off,
- NULL_RTX, NULL_RTX, NULL_RTX);
+ NULL_RTX, NULL_RTX);
if (lr)
END_USE (0);
}
@@ -23741,7 +23736,7 @@ rs6000_emit_prologue (void)
SAVRES_SAVE | SAVRES_GPR);
rs6000_frame_related (insn, spe_save_area_ptr, sp_off - save_off,
- NULL_RTX, NULL_RTX, NULL_RTX);
+ NULL_RTX, NULL_RTX);
}
/* Move the static chain pointer back. */
@@ -23791,7 +23786,7 @@ rs6000_emit_prologue (void)
info->lr_save_offset + ptr_off,
reg_mode, sel);
rs6000_frame_related (insn, ptr_reg, sp_off - ptr_off,
- NULL_RTX, NULL_RTX, NULL_RTX);
+ NULL_RTX, NULL_RTX);
if (lr)
END_USE (0);
}
@@ -23807,7 +23802,7 @@ rs6000_emit_prologue (void)
info->gp_save_offset + frame_off + reg_size * i);
insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
- NULL_RTX, NULL_RTX, NULL_RTX);
+ NULL_RTX, NULL_RTX);
}
else if (!WORLD_SAVE_P (info))
{
@@ -24130,7 +24125,7 @@ rs6000_emit_prologue (void)
info->altivec_save_offset + ptr_off,
0, V4SImode, SAVRES_SAVE | SAVRES_VR);
rs6000_frame_related (insn, scratch_reg, sp_off - ptr_off,
- NULL_RTX, NULL_RTX, NULL_RTX);
+ NULL_RTX, NULL_RTX);
if (REGNO (frame_reg_rtx) == REGNO (scratch_reg))
{
/* The oddity mentioned above clobbered our frame reg. */
@@ -24146,7 +24141,7 @@ rs6000_emit_prologue (void)
for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
{
- rtx areg, savereg, mem, split_reg;
+ rtx areg, savereg, mem;
int offset;
offset = (info->altivec_save_offset + frame_off
@@ -24162,20 +24157,13 @@ rs6000_emit_prologue (void)
mem = gen_frame_mem (V4SImode,
gen_rtx_PLUS (Pmode, frame_reg_rtx, areg));
- insn = emit_move_insn (mem, savereg);
+ /* Rather than emitting a generic move, force use of the stvx
+ instruction, which we always want. In particular we don't
+ want xxpermdi/stxvd2x for little endian. */
+ insn = emit_insn (gen_altivec_stvx_v4si_internal (mem, savereg));
- /* When we split a VSX store into two insns, we need to make
- sure the DWARF info knows which register we are storing.
- Pass it in to be used on the appropriate note. */
- if (!BYTES_BIG_ENDIAN
- && GET_CODE (PATTERN (insn)) == SET
- && GET_CODE (SET_SRC (PATTERN (insn))) == VEC_SELECT)
- split_reg = savereg;
- else
- split_reg = NULL_RTX;
-
rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
- areg, GEN_INT (offset), split_reg);
+ areg, GEN_INT (offset));
}
}
@@ -24817,7 +24805,10 @@ rs6000_emit_epilogue (int sibcall)
mem = gen_frame_mem (V4SImode, addr);
reg = gen_rtx_REG (V4SImode, i);
- emit_move_insn (reg, mem);
+ /* Rather than emitting a generic move, force use of the
+ lvx instruction, which we always want. In particular
+ we don't want lxvd2x/xxpermdi for little endian. */
+ (void)emit_insn (gen_altivec_lvx_v4si_internal (reg, mem));
}
}
@@ -25020,7 +25011,10 @@ rs6000_emit_epilogue (int sibcall)
mem = gen_frame_mem (V4SImode, addr);
reg = gen_rtx_REG (V4SImode, i);
- emit_move_insn (reg, mem);
+ /* Rather than emitting a generic move, force use of the
+ lvx instruction, which we always want. In particular
+ we don't want lxvd2x/xxpermdi for little endian. */
+ (void)emit_insn (gen_altivec_lvx_v4si_internal (reg, mem));
}
}