[SH] Allow reg+disp address modes for atomics

Hi,

The attached patch fixes the lost mem aliasing info for atomic ops on SH
and allows the utilization of reg+disp address modes for atomic ops.
Actually it was supposed to be a pretty straight forward patch that just
replaces the open coded 'mem:QIHISI (match_operand:SI
"arith_reg_operand")' operands with something like 'match_operand:QIHISI
"atomic_mem_operand".  For most of the patterns that's what it does and
the changes are quite mechanical.  However, the QIHImode LLCS patterns
modify the address register of the mem operand and thus required some
special care (additional insns / splits).

I've briefly tested it with
make -k check-gcc RUNTESTFLAGS="sh.exp --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m2e/-ml,-m2e/-mb,-m3/-ml,-m3/-mb,-m3e/-ml,-m3e/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"

to verify that the patterns work in isolation.  However, one thing I'm
not sure about is the fact that the predicate 'atomic_mem_operand_*' and
the Sra,Sdd,Ara,Add mem constraints are not in sync, i.e. the
constraints allow certain things which the predicates do not allow and
vice versa.

Kaz, could you please try the patch on sh4-linux?

Cheers,
Oleg

gcc/ChangeLog:

	PR target/64661
	* config/sh/sh-protos.h (TARGET_ATOMIC_ANY, TARGET_ATOMIC_STRICT,
	TARGET_ATOMIC_SOFT_GUSA, TARGET_ATOMIC_HARD_LLCS,
	TARGET_ATOMIC_SOFT_TCB, TARGET_ATOMIC_SOFT_IMASK): Add parentheses.
	* config/sh/constraints.md (Ara, Add): New constraints.
	* config/sh/sync.md (atomic_mem_operand_0, atomic_mem_operand_1): New
	predicates.
	(atomic_compare_and_swap<mode>, atomic_exchange<mode>): Use
	atomic_mem_operand_0.  Don't use force_reg on the memory address.
	(atomic_compare_and_swapsi_hard): Use atomic_mem_operand_0 predicate and
	Sra constraint.  Convert to insn_and_split.  Add workaround for
	PR 64974.
	(atomic_compare_and_swap<mode>_hard): Copy to
	atomic_compare_and_swap<mode>_hard_1.  Convert to insn_and_split.
	Use atomic_mem_operand_0 predicate.
	(atomic_compare_and_swap<mode>_soft_gusa,
	atomic_exchange<mode>_soft_gusa): Use atomic_mem_operand_0 predicate and
	AraAdd constraints.
	(atomic_compare_and_swap<mode>_soft_tcb,
	atomic_compare_and_swap<mode>_soft_imask,
	atomic_exchange<mode>_soft_tcb,	atomic_exchange<mode>_soft_imask): Use
	atomic_mem_operand_0 predicate and SraSdd constraints.
	(atomic_exchangesi_hard) Use atomic_mem_operand_0 predicate and Sra
	constraint.
	(atomic_exchange<mode>_hard): Copy to atomic_exchange<mode>_hard_1.
	Convert to insn_and_split.  Use atomic_mem_operand_0 predicate.
	(atomic_fetch_<fetchop_name><mode>, atomic_fetch_nand<mode>,
	atomic_<fetchop_name>_fetch<mode>):
	Use atomic_mem_operand_1.  Don't use force_reg on the memory address.
	(atomic_fetch_<fetchop_name>si_hard, atomic_fetch_notsi_hard,
	atomic_fetch_nandsi_hard, atomic_<fetchop_name>_fetchsi_hard,
	atomic_not_fetchsi_hard, atomic_nand_fetchsi_hard): Use
	atomic_mem_operand_1 predicate and Sra constraint.
	(atomic_fetch_<fetchop_name><mode>_hard): Copy to
	atomic_fetch_<fetchop_name><mode>_hard_1.  Convert to insn_and_split.
	Use atomic_mem_operand_1 predicate.
	(atomic_<fetchop_name><mode>_hard): Copy to
	atomic_<fetchop_name><mode>_hard_1.  Convert to insn_and_split.
	Use atomic_mem_operand_1 predicate.
	(atomic_fetch_nand<mode>_hard): Copy to	atomic_fetch_nand<mode>_hard_1.
	Convert to insn_and_split.  Use atomic_mem_operand_1 predicate.
	(atomic_nand<mode>_hard): Copy to atomic_nand<mode>_hard_1.  Convert to
	insn_and_split.  Use atomic_mem_operand_1 predicate.
	(atomic_<fetchop_name>_fetch<mode>_hard): Copy to
	atomic_<fetchop_name>_fetch<mode>_hard_1.  Convert to insn_and_split.
	Use atomic_mem_operand_1 predicate.
	(atomic_nand_fetch<mode>_hard): Copy to atomic_nand_fetch<mode>_hard_1.
	Convert to insn_and_split.  Use atomic_mem_operand_1 predicate.
	(atomic_fetch_not<mode>_hard, atomic_not_fetch<mode>_hard): Replace mems
	in generated insn with original mem operand before emitting the insn.
	(atomic_fetch_<fetchop_name><mode>_soft_gusa,
	atomic_fetch_not<mode>_soft_gusa, atomic_fetch_nand<mode>_soft_gusa,
	atomic_<fetchop_name>_fetch<mode>_soft_gusa,
	atomic_not_fetch<mode>_soft_gusa, atomic_nand_fetch<mode>_soft_gusa):
	Use atomic_mem_operand_1 predicate and AraAdd constraints.
	(atomic_fetch_<fetchop_name><mode>_soft_tcb,
	atomic_<fetchop_name><mode>_soft_tcb, atomic_fetch_not<mode>_soft_tcb,
	atomic_not<mode>_soft_tcb, atomic_fetch_<fetchop_name><mode>_soft_imask,
	atomic_fetch_not<mode>_soft_imask, atomic_fetch_nand<mode>_soft_tcb,
	atomic_nand<mode>_soft_tcb, atomic_fetch_nand<mode>_soft_imask,
	atomic_<fetchop_name>_fetch<mode>_soft_tcb,
	atomic_not_fetch<mode>_soft_tcb,
	atomic_<fetchop_name>_fetch<mode>_soft_imask,
	atomic_not_fetch<mode>_soft_imask, atomic_nand_fetch<mode>,
	atomic_nand_fetch<mode>_soft_tcb, atomic_nand_fetch<mode>_soft_imask):
	Use atomic_mem_operand_1 predicate and SraSdd constraints.

gcc/testsuite/ChangeLog:
	PR target/64661
	* gcc.taget/sh/pr64661-0.h: New.
	* gcc.taget/sh/pr64661-1.c: New.
	* gcc.taget/sh/pr64661-2.c: New.
	* gcc.taget/sh/pr64661-3.c: New.
	* gcc.taget/sh/pr64661-4.c: New.

[SH] Allow reg+disp address modes for atomics

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