diff mbox

[SH] Introduce treg_set_expr

Message ID 1422316971.2376.95.camel@yam-132-YW-E178-FTW
State New
Headers show

Commit Message

Oleg Endo Jan. 27, 2015, 12:02 a.m. UTC 
On Thu, 2015-01-22 at 23:46 +0100, Oleg Endo wrote:

> I will install this the patch from
> https://gcc.gnu.org/ml/gcc-patches/2015-01/msg01743.html
> in 24h if there are no further objections.
> 

The above mentioned patch has been committed as r220081.  This is a
small follow up patch that fixes two oversights.  One is that there's no
point in trying to fit a tst insn constant by right shifting it if it
already fits into K08 (currently done when optimizing for size).
The other oversight was a code path that hasn't been triggered yet in
sh_split_treg_set_expr, into which I ran when trying out more stuff with
the treg_set_expr facility.
Attached patch has been committed as r220144.

Cheers,
Oleg

gcc/ChangeLog:
	PR target/49263
	* config/sh/sh.c (sh_split_treg_set_expr): Invoke emit_insn before
	remove_insn.
	* config/sh/sh.md (tstsi_t): Don't try to optimize constant with right
	shifts if it already fits into K08.

gcc/testsuite/ChangeLog:
	PR target/49263
	* gcc.target/sh/pr49263-4.c: New.
diff mbox

Patch

Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c	(revision 220133)
+++ gcc/config/sh/sh.c	(working copy)
@@ -14466,6 +14466,8 @@ 
 	fprintf (dump_file, "trailing nott insn %d\n", INSN_UID (nott_insn));
     }
 
+  emit_insn (insnlist.first);
+
   if (nott_insn != NULL && append_nott)
     {
       if (dump_file)
@@ -14475,8 +14477,6 @@ 
       append_nott = false;
     }
 
-  emit_insn (insnlist.first);
-
   if (append_nott)
     nott_insn = emit_insn (gen_nott (get_t_reg_rtx ()));
 
Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md	(revision 220133)
+++ gcc/config/sh/sh.md	(working copy)
@@ -742,9 +742,13 @@ 
      variant instead and load the constant into a reg.  For that we'd need
      to do some analysis.  */
 
-  if ((op1val & 0xFFFF) == 0
-      && CONST_OK_FOR_K08 (op1val >> 16) && optimize_size)
+  if (CONST_OK_FOR_K08 (op1val))
     {
+      /* Do nothing.  */
+    }
+  else if ((op1val & 0xFFFF) == 0
+	   && CONST_OK_FOR_K08 (op1val >> 16) && optimize_size)
+    {
       /* Use a swap.w insn to do a shift + reg copy (to R0) in one insn.  */
       op1val = op1val >> 16;
       rtx r = gen_reg_rtx (SImode);
Index: gcc/testsuite/gcc.target/sh/pr49263-4.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr49263-4.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr49263-4.c	(revision 0)
@@ -0,0 +1,10 @@ 
+/* Verify that TST #imm, R0 instruction is generated if the constant
+   allows it when compiling for -Os.  */
+/* { dg-do compile }  */
+/* { dg-options "-Os" } */
+/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not "extu" } } */
+/* { dg-final { scan-assembler-not "exts" } } */
+/* { dg-final { scan-assembler-not "shlr" } } */
+
+#include "pr49263.c"