From patchwork Mon Dec 15 09:23:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Huber X-Patchwork-Id: 421028 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3E0B0140082 for ; Mon, 15 Dec 2014 20:24:06 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=fN2P0rTzCGajNZy9NUcBA3NPcatD/A5dEoUR1L18lrVU+EZZ4Md9d TNlzYzzGXrJVjoDJq9f58Hefnn+VnuK/SWA3mV4qIumzKDiDtSs05LbNGaIrj75v VerwctEIgT119wzINCZmfqkGPOn49aDalzO8C2tooPBniYNRqaoxaI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=qB1t+efCC6sYkENy5bsiPimqvRM=; b=vgDWn7FsVq63G3txTWNg Ocg/0EW9q9ZXLOrR/FInO6xMlhGjQEW+QjUlRZzY+RWATVfyW9fvFjA6GT1g3XTQ D5gfPTMne6cQqvLydhQYk+oDErdSUX69U5+qtoQ/VoCk8C8A0JdcGD3aXk/HCa+2 MN4bfYisnsLbIdc5gHiQqGc= Received: (qmail 11329 invoked by alias); 15 Dec 2014 09:23:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 11317 invoked by uid 89); 15 Dec 2014 09:23:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.0 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 X-HELO: mail-out.m-online.net Received: from mail-out.m-online.net (HELO mail-out.m-online.net) (212.18.0.9) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (CAMELLIA256-SHA encrypted) ESMTPS; Mon, 15 Dec 2014 09:23:56 +0000 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 3k1HGc5Wkvz3hjjG; Mon, 15 Dec 2014 10:23:52 +0100 (CET) Received: from mail.embedded-brains.de (host-82-135-62-35.customer.m-online.net [82.135.62.35]) by mail.mnet-online.de (Postfix) with ESMTP id 3k1HGb6qc4zvhN6; Mon, 15 Dec 2014 10:23:51 +0100 (CET) Received: by mail.embedded-brains.de (Postfix, from userid 65534) id 8D674652CFE; Mon, 15 Dec 2014 10:23:51 +0100 (CET) Received: from self.eb.z (unknown [192.168.100.11]) by mail.embedded-brains.de (Postfix) with ESMTP id CA0C8652CFC; Mon, 15 Dec 2014 10:23:50 +0100 (CET) From: Sebastian Huber To: gcc-patches@gcc.gnu.org Cc: devel@rtems.org, Sebastian Huber Subject: [PATCH 2/2] RTEMS: Use MULTILIB_REQUIRED for ARM Date: Mon, 15 Dec 2014 10:23:49 +0100 Message-Id: <1418635429-12899-2-git-send-email-sebastian.huber@embedded-brains.de> In-Reply-To: <1418635429-12899-1-git-send-email-sebastian.huber@embedded-brains.de> References: <1418635429-12899-1-git-send-email-sebastian.huber@embedded-brains.de> X-IsSubscribed: yes This patch should be applied to GCC mainline. I do not have write access, so in case this gets approved, please commit it for me. gcc/ChangeLog 2014-12-15 Sebastian Huber * config/arm/t-rtems: Use MULTILIB_REQUIRED instead of MULTILIB_EXCEPTIONS. --- gcc/config/arm/t-rtems | 173 ++++--------------------------------------------- 1 file changed, 13 insertions(+), 160 deletions(-) diff --git a/gcc/config/arm/t-rtems b/gcc/config/arm/t-rtems index 92c4dcb..3b62181 100644 --- a/gcc/config/arm/t-rtems +++ b/gcc/config/arm/t-rtems @@ -1,4 +1,4 @@ -# Custom RTEMS EABI multilibs +# Custom RTEMS multilibs for ARM MULTILIB_OPTIONS = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon/mfpu=vfpv3-d16/mfpu=fpv4-sp-d16 mfloat-abi=hard MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 fpv4-sp-d16 hard @@ -6,162 +6,15 @@ MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 fpv4 # Enumeration of multilibs MULTILIB_EXCEPTIONS = -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon -# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16 -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m -MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/mfpu=neon -MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv6-m -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-a -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-r -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-m -MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mfpu=neon -MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mfloat-abi=hard + +MULTILIB_REQUIRED = +MULTILIB_REQUIRED += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_REQUIRED += mbig-endian/mthumb/march=armv7-r +MULTILIB_REQUIRED += mthumb/march=armv6-m +MULTILIB_REQUIRED += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7-a +MULTILIB_REQUIRED += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7-r +MULTILIB_REQUIRED += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7-m +MULTILIB_REQUIRED += mthumb