From patchwork Sat Dec 13 13:19:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleg Endo X-Patchwork-Id: 420762 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 822A714009B for ; Sun, 14 Dec 2014 00:20:13 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:date:content-type:mime-version; q= dns; s=default; b=f1ym1QdpRiykFdrwyIdyp176UjEe7hNBrAv325MIWx1TVB XoquKJqwOEnF++2IyrViycGnfxx+bp2qsUhwc1DoBbDMTRM6AfEQmoE4mvoPrDr/ VE8aow9h2AMrXkjtoXcHTOJyxMDF/87XkFNf2BjXsUKXXBnIUVc+lgzQ3bLJI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:date:content-type:mime-version; s= default; bh=Zg3l96I4r0mmGEr6wgyKaQWffOs=; b=hx95gUjUBXBPGxrhxCxb LYgnN2XZaQpDzjN5SeVWJuFYOnqNn8Mhqg+/7l+Ei4GOGYMekQDMDKxgc/V4DNSi kVoXGNvrcdTAPk14obJCxjjoNR8htGZrbPlXyoLETB2XydxuUe2mu2qulA5brktP mQ/e5ISPXXWaoW3W2PY7kPM= Received: (qmail 14345 invoked by alias); 13 Dec 2014 13:20:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 14330 invoked by uid 89); 13 Dec 2014 13:20:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_NONE, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mailout02.t-online.de Received: from mailout02.t-online.de (HELO mailout02.t-online.de) (194.25.134.17) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Sat, 13 Dec 2014 13:20:03 +0000 Received: from fwd19.aul.t-online.de (fwd19.aul.t-online.de [172.20.27.65]) by mailout02.t-online.de (Postfix) with SMTP id 916743233B6 for ; Sat, 13 Dec 2014 14:19:59 +0100 (CET) Received: from [192.168.0.104] (SmJROZZlrhWh5TSEjXbs4HqA4YctJWRVbUw5ghkBcDM59iDcJXaIQaWI7JmpCkKQsY@[84.180.116.254]) by fwd19.t-online.de with (TLSv1.2:ECDHE-RSA-AES256-SHA encrypted) esmtp id 1Xzmby-1NzuJU0; Sat, 13 Dec 2014 14:19:54 +0100 Message-ID: <1418476793.14512.19.camel@yam-132-YW-E178-FTW> Subject: [SH][committed] PR 53513 - Fix test case failures From: Oleg Endo To: gcc-patches Date: Sat, 13 Dec 2014 14:19:53 +0100 Mime-Version: 1.0 X-IsSubscribed: yes Hi, After the changes regarding the FPSCR handling, some SH test cases started to fail. This fixes it. Tested with make -k check-gcc RUNTESTFLAGS="sh.exp --target_board=sh-sim \{-m4/-ml,-m2/-ml}" to verify that the test case passes again. Committed as r218707. Cheers, Oleg gcc/testsuite/ChangeLog: PR target/53513 * gcc.target/sh/attr-isr-nosave_low_regs.c: Fix matching of expected register push/pop sequences. * gcc.target/sh/attr-isr.c: Likewise. * gcc.target/sh/attr-isr-trapa.c: Likewise. * gcc.target/sh/pragma-isr-nosave_low_regs.c: Likewise. * gcc.target/sh/pragma-isr-trapa.c: Likewise. * gcc.target/sh/pragma-isr-trapa2.c: Likewise. Index: gcc/testsuite/gcc.target/sh/attr-isr-nosave_low_regs.c =================================================================== --- gcc/testsuite/gcc.target/sh/attr-isr-nosave_low_regs.c (revision 218705) +++ gcc/testsuite/gcc.target/sh/attr-isr-nosave_low_regs.c (working copy) @@ -1,15 +1,14 @@ /* A call will clobber all call-saved registers. If #pragma nosave_low_regs is specified, do not save/restore r0..r7. (On SH3* and SH4* r0..r7 are banked) - One of these registers will also do fine to hold the function address. - Call-saved registers r8..r13 also don't need to be restored. */ + Call-saved registers r8..r13 also don't need to be restored. + To test that we look for register push insns such as 'mov.l r0,@-r15'. */ /* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */ /* { dg-skip-if "" { "sh*-*-*" } { "-m1*" "-m2*" "-m5*" } { "" } } */ /* { dg-options "-O" } */ /* { dg-final { scan-assembler-times "rte" 1 } } */ -/* { dg-final { scan-assembler-not "\[^f\]r\[0-9\]\[ \t\]*," } } */ -/* { dg-final { scan-assembler-not "\[^f\]r\[89\]" } } */ -/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } } */ /* { dg-final { scan-assembler-times "macl" 2 } } */ extern void bar (void); Index: gcc/testsuite/gcc.target/sh/pragma-isr-nosave_low_regs.c =================================================================== --- gcc/testsuite/gcc.target/sh/pragma-isr-nosave_low_regs.c (revision 218705) +++ gcc/testsuite/gcc.target/sh/pragma-isr-nosave_low_regs.c (working copy) @@ -1,15 +1,14 @@ /* A call will clobber all call-saved registers. If #pragma nosave_low_regs is specified, do not save/restore r0..r7. (On SH3* and SH4* r0..r7 are banked) - One of these registers will also do fine to hold the function address. - Call-saved registers r8..r13 also don't need to be restored. */ + Call-saved registers r8..r14 also don't need to be restored. + To test that we look for register push insns such as 'mov.l r0,@-r15'. */ /* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */ /* { dg-skip-if "" { "sh*-*-*" } { "-m1*" "-m2*" "-m5*" } { "" } } */ /* { dg-options "-O" } */ /* { dg-final { scan-assembler-times "rte" 1 } } */ -/* { dg-final { scan-assembler-not "\[^f\]r\[0-9\]\[ \t\]*," } } */ -/* { dg-final { scan-assembler-not "\[^f\]r\[89\]" } } */ -/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } } */ /* { dg-final { scan-assembler-times "macl" 2 } } */ extern void foo (void); Index: gcc/testsuite/gcc.target/sh/attr-isr.c =================================================================== --- gcc/testsuite/gcc.target/sh/attr-isr.c (revision 218705) +++ gcc/testsuite/gcc.target/sh/attr-isr.c (working copy) @@ -1,6 +1,14 @@ +/* The call will clobber r0..r7, which will need not be saved/restored, but + not the call-saved registers r8..r14. Check this by counting the register + push insns. */ /* { dg-do compile { target { { { sh-*-* sh[1234ble]*-*-* } && { ! sh2a*-*-* } } && nonpic } } } */ /* { dg-skip-if "" { "sh*-*-*" } { "-m2a*" } { "" } } */ /* { dg-options "-O" } */ +/* { dg-final { scan-assembler-times "rte" 1} } */ +/* { dg-final { scan-assembler-times "mov.l\tr\[0-7\],@-r15" 8 } } */ +/* { dg-final { scan-assembler-not "mov.l\tr\[89\],@-r15" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } } */ + extern void foo (); void @@ -8,13 +16,3 @@ { foo (); } - -/* { dg-final { scan-assembler-times "rte" 1} } */ -/* The call will clobber r0..r7, which will need not be saved/restored. - One of these registers will do fine to hold the function address, - hence the all-saved registers r8..r13 don't need to be restored. */ -/* { dg-final { scan-assembler-times "r15\[+\],\[ \t\]*r\[0-9\]\[ \t\]*\n" 8 } } */ -/* { dg-final { scan-assembler-times "\[^f\]r\[0-9\]\[ \t\]*," 8 } } */ -/* { dg-final { scan-assembler-not "\[^f\]r1\[0-3\]" } } */ -/* { dg-final { scan-assembler-times "macl" 2} } */ -/* { dg-final { scan-assembler-not "rte.*\n.*r15\[+\],r\[0-7\]\n" } } */ Index: gcc/testsuite/gcc.target/sh/pragma-isr-trapa.c =================================================================== --- gcc/testsuite/gcc.target/sh/pragma-isr-trapa.c (revision 218705) +++ gcc/testsuite/gcc.target/sh/pragma-isr-trapa.c (working copy) @@ -3,10 +3,8 @@ /* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */ /* { dg-options "-O" } */ /* { dg-final { scan-assembler-times "rte" 1 } } */ -/* { dg-final { scan-assembler-not "r\[0-7\]\[ \t,\]\[^\n\]*r15" } } */ -/* { dg-final { scan-assembler-not "@r15\[^\n\]*r\[0-7\]\n" } } */ -/* { dg-final { scan-assembler-not "r\[8-9\]" } } */ -/* { dg-final { scan-assembler-not "r1\[,0-3\]" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } } */ /* { dg-final { scan-assembler-not "macl" } } */ extern void foo (void); Index: gcc/testsuite/gcc.target/sh/pragma-isr-trapa2.c =================================================================== --- gcc/testsuite/gcc.target/sh/pragma-isr-trapa2.c (revision 218705) +++ gcc/testsuite/gcc.target/sh/pragma-isr-trapa2.c (working copy) @@ -6,13 +6,12 @@ /* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */ /* { dg-options "-O" } */ /* { dg-final { scan-assembler-times "rte" 1 } } */ -/* { dg-final { scan-assembler-times "r\[0-7\]\n" 3 } } */ -/* { dg-final { scan-assembler-not "r\[8-9\]" } } */ -/* { dg-final { scan-assembler-not "r1\[,0-3\]" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } } */ /* { dg-final { scan-assembler-not "macl" } } */ /* Expect that fpscr needs to be saved, loaded and restored. */ -/* { dg-final { scan-assembler-times "\[^_\]fpscr" 3 } } */ +/* { dg-final { scan-assembler-times "\[^_\]fpscr" 4 } } */ extern void foo (void); Index: gcc/testsuite/gcc.target/sh/attr-isr-trapa.c =================================================================== --- gcc/testsuite/gcc.target/sh/attr-isr-trapa.c (revision 218705) +++ gcc/testsuite/gcc.target/sh/attr-isr-trapa.c (working copy) @@ -3,10 +3,8 @@ /* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */ /* { dg-options "-O" } */ /* { dg-final { scan-assembler-times "rte" 1 } } */ -/* { dg-final { scan-assembler-not "r\[0-7\]\[ \t,\]\[^\n\]*r15" } } */ -/* { dg-final { scan-assembler-not "@r15\[^\n\]*r\[0-7\]\n" } } */ -/* { dg-final { scan-assembler-not "r\[8-9\]" } } */ -/* { dg-final { scan-assembler-not "r1\[,0-3\]" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } } */ +/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } } */ /* { dg-final { scan-assembler-not "macl" } } */ extern void foo (void); Index: gcc/testsuite/ChangeLog =================================================================== --- gcc/testsuite/ChangeLog (revision 218706) +++ gcc/testsuite/ChangeLog (working copy) @@ -1,5 +1,16 @@ 2014-12-13 Oleg Endo + PR target/53513 + * gcc.target/sh/attr-isr-nosave_low_regs.c: Fix matching of expected + register push/pop sequences. + * gcc.target/sh/attr-isr.c: Likewise. + * gcc.target/sh/attr-isr-trapa.c: Likewise. + * gcc.target/sh/pragma-isr-nosave_low_regs.c: Likewise. + * gcc.target/sh/pragma-isr-trapa.c: Likewise. + * gcc.target/sh/pragma-isr-trapa2.c: Likewise. + +2014-12-13 Oleg Endo + * gcc.target/sh/sp-switch.c: Match zero or more underscores in alt_stack symbol.