@@ -1,47 +1,127 @@
# Custom RTEMS EABI multilibs
-MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon mfloat-abi=hard
-MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon hard
+MULTILIB_OPTIONS = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon/mfpu=vfpv3-d16 mfloat-abi=hard
+MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 hard
# Enumeration of multilibs
MULTILIB_EXCEPTIONS =
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon
+# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfloat-abi=hard
+# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mthumb
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m
+MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon
+MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16
+MULTILIB_EXCEPTIONS += mbig-endian/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mbig-endian
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon
+MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon
+MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon
+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon
+MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m
MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/mfpu=neon
+MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb
MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon
+MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv6-m
MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon
+MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-a
MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon
+MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-r
MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon
+MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-m
MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mfpu=neon
+MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mfloat-abi=hard