From patchwork Wed Feb 5 03:15:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bill Schmidt X-Patchwork-Id: 316803 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 6090C2C0097 for ; Wed, 5 Feb 2014 14:15:14 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:cc:date:content-type :content-transfer-encoding:mime-version; q=dns; s=default; b=TpT j16p/vDzWUgJApiy+LUWTsOqK2bLxCYfb5VphC4QMQ9tOLzNPYkDIDGaizuuC5hN S5k6STpxIVP6VlXAX+3ReayhJULCMORqwjAEcmGqOtTRzTNWy3Nf6Z13qA1wWFNe G8NY2HP/iu21ehU43HeyDtUoZdnoAZolNt3HsFUU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:cc:date:content-type :content-transfer-encoding:mime-version; s=default; bh=O8B81Px2Y h55hbxrh9AhET/rDCw=; b=CDMA/boFf62GzsKwhEaipn7wJaf6kYfnCfBJUoyQM MzcN43TUmTFdKnGRwBOK3q4uaVv4WiUpo7qmNGDDia8VMAep7N2+mgZvIMcXd2ds CuItePl8XhvYGePu5TCtF57cU5JxmzDthdM8ldC0j/jZR0JgyoSMVb1qjh3Jyr9T ms= Received: (qmail 27112 invoked by alias); 5 Feb 2014 03:15:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 27098 invoked by uid 89); 5 Feb 2014 03:15:05 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-3.9 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: e23smtp07.au.ibm.com Received: from e23smtp07.au.ibm.com (HELO e23smtp07.au.ibm.com) (202.81.31.140) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Wed, 05 Feb 2014 03:15:04 +0000 Received: from /spool/local by e23smtp07.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 5 Feb 2014 13:14:57 +1000 Received: from d23dlp01.au.ibm.com (202.81.31.203) by e23smtp07.au.ibm.com (202.81.31.204) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Wed, 5 Feb 2014 13:14:55 +1000 Received: from d23relay04.au.ibm.com (d23relay04.au.ibm.com [9.190.234.120]) by d23dlp01.au.ibm.com (Postfix) with ESMTP id 937822CE8051 for ; Wed, 5 Feb 2014 14:14:55 +1100 (EST) Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay04.au.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s152tZph35193082 for ; Wed, 5 Feb 2014 13:55:36 +1100 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s153Es61031783 for ; Wed, 5 Feb 2014 14:14:54 +1100 Received: from [9.77.137.133] (sig-9-77-137-133.mts.ibm.com [9.77.137.133]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id s153EpUA031748; Wed, 5 Feb 2014 14:14:53 +1100 Message-ID: <1391570103.9039.40.camel@gnopaine> Subject: [PATCH, rs6000] Handle -maltivec=be for vec_sum2s builtin (last -maltivec=be patch) From: Bill Schmidt To: gcc-patches@gcc.gnu.org Cc: dje.gcc@gmail.com Date: Tue, 04 Feb 2014 21:15:03 -0600 Mime-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14020503-0260-0000-0000-0000044FE7DC X-IsSubscribed: yes Hi, One final patch in the series, this one for vec_sum2s. This builtin requires some additional code generation for the case of little endian without -maltivec=be. Here's an example: va = {-10,1,2,3}; 0x 00000003 00000002 00000001 fffffff6 vb = {100,101,102,-103}; 0x ffffff99 00000066 00000065 00000064 vc = vec_sum2s (va, vb); 0x ffffff9e 00000000 0000005c 00000000 = {0,92,0,-98}; We need to add -10 + 1 + 101 = 92 and place it in vc[1], and add 2 + 3 + -103 and place the result in vc[3], with zeroes in the other two elements. To do this, we first use "vsldoi vs,vb,vb,12" to rotate 101 and -103 into big-endian elements 1 and 3, as required by the vsum2sws instruction: 0x ffffff99 00000066 00000065 00000064 ffffff99 00000066 00000065 00000064 ^^^^^^^^ ^^^^^^^^ ^^^^^^^^ ^^^^^^^^ vs = 00000064 ffffff99 00000066 00000065 Executing "vsum2sws vs,va,vs" then gives vs = 0x 00000000 ffffff9e 00000000 0000005c which then must be shifted into position with "vsldoi vc,vs,vs,4" 0x 00000000 ffffff9e 00000000 0000005c 00000000 ffffff9e 00000000 0000005c ^^^^^^^^ ^^^^^^^^ ^^^^^^^^ ^^^^^^^^ vc = ffffff9e 00000000 0000005c 00000000 which is the desired result. In addition to this change, I noticed a redundant test from one of my previous patches and simplified it. (BYTES_BIG_ENDIAN implies VECTOR_ELT_ORDER_BIG, so we don't need to test BYTES_BIG_ENDIAN.) As usual, new test cases are added to cover the possible cases. These are simpler this time since only vector signed integer is a legal type for vec_sum2s. Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no regressions. Is this ok for trunk? Thanks, Bill gcc: 2014-02-04 Bill Schmidt * config/rs6000/altivec.md (altivec_vsum2sws): Adjust code generation for -maltivec=be. (altivec_vsumsws): Simplify redundant test. gcc/testsuite: 2014-02-04 Bill Schmidt * gcc.dg/vmx/sum2s.c: New. * gcc.dg/vmx/sum2s-be-order.c: New. Index: gcc/testsuite/gcc.dg/vmx/sum2s.c =================================================================== --- gcc/testsuite/gcc.dg/vmx/sum2s.c (revision 0) +++ gcc/testsuite/gcc.dg/vmx/sum2s.c (revision 0) @@ -0,0 +1,13 @@ +#include "harness.h" + +static void test() +{ + vector signed int vsia = {-10,1,2,3}; + vector signed int vsib = {100,101,102,-103}; + vector signed int vsir; + vector signed int vsier = {0,92,0,-98}; + + vsir = vec_sum2s (vsia, vsib); + + check (vec_all_eq (vsir, vsier), "vsir"); +} Index: gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c =================================================================== --- gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c (revision 0) +++ gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c (revision 0) @@ -0,0 +1,19 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + vector signed int vsia = {-10,1,2,3}; + vector signed int vsib = {100,101,102,-103}; + vector signed int vsir; +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector signed int vsier = {91,0,107,0}; +#else + vector signed int vsier = {0,92,0,-98}; +#endif + + vsir = vec_sum2s (vsia, vsib); + + check (vec_all_eq (vsir, vsier), "vsir"); +} Index: gcc/config/rs6000/altivec.md =================================================================== --- gcc/config/rs6000/altivec.md (revision 207479) +++ gcc/config/rs6000/altivec.md (working copy) @@ -1592,10 +1610,21 @@ (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v") (match_operand:V4SI 2 "register_operand" "v")] UNSPEC_VSUM2SWS)) - (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))] + (set (reg:SI 110) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR)) + (clobber (match_scratch:V4SI 3 "=v"))] "TARGET_ALTIVEC" - "vsum2sws %0,%1,%2" - [(set_attr "type" "veccomplex")]) +{ + if (VECTOR_ELT_ORDER_BIG) + return "vsum2sws %0,%1,%2"; + else + return "vsldoi %3,%2,%2,12\n\tvsum2sws %3,%1,%3\n\tvsldoi %0,%3,%3,4"; +} + [(set_attr "type" "veccomplex") + (set (attr "length") + (if_then_else + (match_test "VECTOR_ELT_ORDER_BIG") + (const_string "4") + (const_string "12")))]) (define_insn "altivec_vsumsws" [(set (match_operand:V4SI 0 "register_operand" "=v") @@ -1606,7 +1635,7 @@ (clobber (match_scratch:V4SI 3 "=v"))] "TARGET_ALTIVEC" { - if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG) + if (VECTOR_ELT_ORDER_BIG) return "vsumsws %0,%1,%2"; else return "vspltw %3,%2,0\n\tvsumsws %3,%1,%3\n\tvspltw %0,%3,3"; @@ -1614,7 +1643,7 @@ [(set_attr "type" "veccomplex") (set (attr "length") (if_then_else - (match_test "(BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)") + (match_test "(VECTOR_ELT_ORDER_BIG)") (const_string "4") (const_string "12")))])