===================================================================
@@ -0,0 +1,20 @@
+/* Check whether rte is generated for two ISRs. */
+/* { dg-do compile { target h8300-*-* } } */
+/* { dg-options "-O3" } */
+/* { dg-final { scan-assembler-times "rte" 2} } */
+
+extern void foo (void);
+
+#pragma interrupt
+void
+isr1 (void)
+{
+ foo ();
+}
+
+#pragma interrupt
+void
+isr2 (void)
+{
+ foo ();
+}
===================================================================
@@ -0,0 +1,21 @@
+/* Check whether rte is generated only for an ISR. */
+/* { dg-do compile { target h8300-*-* } } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler-times "rte" 1 } } */
+
+#pragma interrupt
+void
+isr (void)
+{
+}
+
+void
+delay (int a)
+{
+}
+
+int
+main (void)
+{
+ return 0;
+}
===================================================================
@@ -0,0 +1,41 @@
+# Copyright (C) 2013 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't a h8300 target.
+if ![istarget h8300*-*-*] then {
+ return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+ set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
+ "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
===================================================================
@@ -0,0 +1,32 @@
+/* A call will clobber all call-saved registers.
+ If #pragma nosave_low_regs is specified, do not save/restore r0..r7.
+ (On SH3* and SH4* r0..r7 are banked)
+ One of these registers will also do fine to hold the function address.
+ Call-saved registers r8..r13 also don't need to be restored. */
+/* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1*" "-m2*" "-m5*" } { "" } } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler-times "rte" 1 } } */
+/* { dg-final { scan-assembler-not "\[^f\]r\[0-9\]\[ \t\]*," } } */
+/* { dg-final { scan-assembler-not "\[^f\]r\[89\]" } } */
+/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } } */
+/* { dg-final { scan-assembler-times "macl" 2 } } */
+
+extern void bar (void);
+
+void
+foo (void)
+{
+}
+
+#pragma interrupt
+void
+( __attribute__ ((nosave_low_regs)) isr) (void)
+{
+ bar ();
+}
+
+void
+delay (int a)
+{
+}
===================================================================
@@ -0,0 +1,24 @@
+/* Check whether trapa is generated only for an ISR. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler-times "trapa\[ \t\]\[ \t\]*#4" 1 } } */
+
+#pragma interrupt
+void isr (void) __attribute__ ((trap_exit (4)));
+
+void
+isr (void)
+{
+}
+
+void
+delay (int a)
+{
+}
+
+int
+main (void)
+{
+ return 0;
+}
===================================================================
@@ -0,0 +1,24 @@
+/* Check that no interrupt-specific register saves are generated.
+ The function call will require to load the address first into a register,
+ then use that for a jsr or jmp. It will also need to load a constant
+ address in order to load fpscr. */
+/* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler-times "rte" 1 } } */
+/* { dg-final { scan-assembler-times "r\[0-7\]\n" 3 } } */
+/* { dg-final { scan-assembler-not "r\[8-9\]" } } */
+/* { dg-final { scan-assembler-not "r1\[,0-3\]" } } */
+/* { dg-final { scan-assembler-not "macl" } } */
+
+/* Expect that fpscr needs to be saved, loaded and restored. */
+/* { dg-final { scan-assembler-times "\[^_\]fpscr" 3 } } */
+
+extern void foo (void);
+
+#pragma trapa
+void
+isr (void)
+{
+ foo ();
+}
===================================================================
@@ -0,0 +1,23 @@
+/* A call will clobber all call-saved registers.
+ If #pragma nosave_low_regs is specified, do not save/restore r0..r7.
+ (On SH3* and SH4* r0..r7 are banked)
+ One of these registers will also do fine to hold the function address.
+ Call-saved registers r8..r13 also don't need to be restored. */
+/* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1*" "-m2*" "-m5*" } { "" } } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler-times "rte" 1 } } */
+/* { dg-final { scan-assembler-not "\[^f\]r\[0-9\]\[ \t\]*," } } */
+/* { dg-final { scan-assembler-not "\[^f\]r\[89\]" } } */
+/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } } */
+/* { dg-final { scan-assembler-times "macl" 2 } } */
+
+extern void foo (void);
+
+#pragma interrupt
+#pragma nosave_low_regs
+void
+isr (void)
+{
+ foo ();
+}
===================================================================
@@ -0,0 +1,20 @@
+/* Check whether rte is generated for two ISRs. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
+/* { dg-final { scan-assembler-times "rte" 2 } } */
+
+extern void foo (void);
+
+#pragma interrupt
+void
+isr1 (void)
+{
+ foo ();
+}
+
+#pragma interrupt
+void
+isr2 (void)
+{
+ foo ();
+}
===================================================================
@@ -0,0 +1,21 @@
+/* Check whether rte is generated only for an ISRs. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
+/* { dg-final { scan-assembler-times "rte" 1 } } */
+
+#pragma interrupt
+void
+isr (void)
+{
+}
+
+void
+delay (int a)
+{
+}
+
+int
+main (void)
+{
+ return 0;
+}
===================================================================
@@ -0,0 +1,31 @@
+/* Check that trapa / interrput_handler attributes can paired in
+ either order. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler "trapa\[ \t\]\[ \t\]*#4"} } */
+/* { dg-final { scan-assembler-times "trapa" 1 } } */
+
+void h0 (void) __attribute__ ((trap_exit (4))) __attribute__ ((interrupt_handler));
+void h1 (void) __attribute__ ((interrupt_handler)) __attribute__ ((trap_exit (5)));
+
+void
+foo (void)
+{
+}
+
+void
+h0 (void)
+{
+}
+
+void delay
+(int a)
+{
+}
+
+int
+main (void)
+{
+ return 0;
+}
===================================================================
@@ -0,0 +1,19 @@
+/* Check that no interrupt-specific register saves are generated. */
+/* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler-times "rte" 1 } } */
+/* { dg-final { scan-assembler-not "r\[0-7\]\[ \t,\]\[^\n\]*r15" } } */
+/* { dg-final { scan-assembler-not "@r15\[^\n\]*r\[0-7\]\n" } } */
+/* { dg-final { scan-assembler-not "r\[8-9\]" } } */
+/* { dg-final { scan-assembler-not "r1\[,0-3\]" } } */
+/* { dg-final { scan-assembler-not "macl" } } */
+
+extern void foo (void);
+
+#pragma trapa
+void
+isr (void)
+{
+ foo ();
+}
===================================================================
@@ -0,0 +1,18 @@
+/* Check that no interrupt-specific register saves are generated. */
+/* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler-times "rte" 1 } } */
+/* { dg-final { scan-assembler-not "r\[0-7\]\[ \t,\]\[^\n\]*r15" } } */
+/* { dg-final { scan-assembler-not "@r15\[^\n\]*r\[0-7\]\n" } } */
+/* { dg-final { scan-assembler-not "r\[8-9\]" } } */
+/* { dg-final { scan-assembler-not "r1\[,0-3\]" } } */
+/* { dg-final { scan-assembler-not "macl" } } */
+
+extern void foo (void);
+
+void
+(__attribute__ ((trapa_handler)) isr) (void)
+{
+ foo ();
+}
===================================================================
@@ -1,17 +0,0 @@
-/* { dg-do compile { target sh-*-* sh[1234ble]*-*-* } } */
-/* { dg-options "-O" } */
-/* This test case will check whether trapa is generated only for isr. */
-#pragma interrupt
-void isr() __attribute__ ((trap_exit (4)));
-void isr()
-{
-}
-void delay(int a)
-{
-}
-int main()
-{
- return 0;
-}
-
-/* { dg-final { scan-assembler-times "trapa\[ \t\]\[ \t\]*#4" 1} } */
===================================================================
@@ -1,23 +0,0 @@
-/* { dg-do compile { target sh-*-* sh[1234ble]*-*-* } } */
-/* { dg-options "-O" } */
-/* Check that trapa / interrput_handler attributes can paired in
- either order. */
-void h0() __attribute__ ((trap_exit (4))) __attribute__ ((interrupt_handler));
-void h1() __attribute__ ((interrupt_handler)) __attribute__ ((trap_exit (5)));
-
-void foo ()
-{
-}
-
-void h0 () {}
-/* { dg-final { scan-assembler "trapa\[ \t\]\[ \t\]*#4"} } */
-/* { dg-final { scan-assembler-times "trapa" 1} } */
-
-void delay(int a)
-{
-}
-int main()
-{
- return 0;
-}
-
===================================================================
@@ -1,24 +0,0 @@
-/* { dg-do compile { target { { sh-*-* sh4*-*-* } && nonpic } } } */
-/* { dg-skip-if "FPU Required" { "sh*-*-*" } { "-m*nofpu*" } { "" } } */
-/* { dg-skip-if "FPU Required" { "sh*-*-*" } { "-m4al*" } { "" } } */
-/* { dg-options "-O -m4" } */
-
-extern void foo ();
-#pragma trapa
-void
-isr()
-{
- foo ();
-}
-
-/* { dg-final { scan-assembler-times "rte" 1} } */
-/* No interrupt-specific saves should be needed.
- The function call will require to load the address first into a register,
- then use that for a jsr or jmp. It will also need to load a constant
- address in order to load fpscr. */
-/* { dg-final { scan-assembler-times "r\[0-7\]\n" 3 } } */
-/* { dg-final { scan-assembler-not "r\[8-9\]" } } */
-/* { dg-final { scan-assembler-not "r1\[,0-3\]" } } */
-/* { dg-final { scan-assembler-not "macl" } } */
-/* fpscr needs to be saved, loaded and restored. */
-/* { dg-final { scan-assembler-times "\[^_\]fpscr" 3 } } */
===================================================================
@@ -1,17 +0,0 @@
-/* { dg-do compile { target { { sh-*-* sh[1234ble]*-*-* } && nonpic } } } */
-/* { dg-options "-O" } */
-extern void foo ();
-
-void
-(__attribute__ ((trapa_handler)) isr) ()
-{
- foo ();
-}
-
-/* { dg-final { scan-assembler-times "rte" 1} } */
-/* No interrupt-specific saves should be needed. /
-/* { dg-final { scan-assembler-not "\[^f\]r\[0-7\]\[ \t,\]\[^\n\]*r15" } } */
-/* { dg-final { scan-assembler-not "@r15\[^\n\]*\[^f\]r\[0-7\]\n" } } */
-/* { dg-final { scan-assembler-not "\[^f\]r\[8-9\]" } } */
-/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } } */
-/* { dg-final { scan-assembler-not "macl" } } */
===================================================================
@@ -1,16 +0,0 @@
-/* { dg-do compile { target h8300-*-* sh-*-* sh[1234ble]*-*-* } } */
-/* { dg-options "-O" } */
-/* This test case will check whether rte is generated only for isr. */
-#pragma interrupt
-void isr()
-{
-}
-void delay(int a)
-{
-}
-int main()
-{
- return 0;
-}
-
-/* { dg-final { scan-assembler-times "rte" 1} } */
===================================================================
@@ -1,28 +0,0 @@
-/* { dg-do compile { target { { sh-*-* sh[1234ble]*-*-* } && nonpic } } } */
-/* { dg-options "-O" } */
-
-extern void bar ();
-
-void foo ()
-{
-}
-
-#pragma interrupt
-void ( __attribute__ ((nosave_low_regs)) isr) ()
-{
- bar ();
-}
-
-void delay(int a)
-{
-}
-
-/* { dg-final { scan-assembler-times "rte" 1} } */
-/* A call will clobber all call-saved registers, but because of
- #pragma nosave_low_regs, r0..r7 need not be saved/restored.
- One of these registers will also do fine to hold the function address.
- Call-saved registers r8..r13 also don't need to be restored. */
-/* { dg-final { scan-assembler-not "\[^f\]r\[0-9\]\[ \t\]*," } } */
-/* { dg-final { scan-assembler-not "\[^f\]r\[89\]" } } */
-/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } } */
-/* { dg-final { scan-assembler-times "macl" 2} } */
===================================================================
@@ -1,20 +0,0 @@
-/* { dg-do compile { target { { sh-*-* sh[1234ble]*-*-* } && nonpic } } } */
-/* { dg-options "-O" } */
-extern void foo ();
-#pragma interrupt
-#pragma nosave_low_regs
-void
-isr()
-{
- foo ();
-}
-
-/* { dg-final { scan-assembler-times "rte" 1} } */
-/* A call will clobber all call-saved registers, but because of
- #pragma nosave_low_regs, r0..r7 need not be saved/restored.
- One of these registers will also do fine to hold the function address.
- Call-saved registers r8..r13 also don't need to be restored. */
-/* { dg-final { scan-assembler-not "\[^f\]r\[0-9\]\[ \t\]*," } } */
-/* { dg-final { scan-assembler-not "\[^f\]r\[89\]" } } */
-/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } } */
-/* { dg-final { scan-assembler-times "macl" 2} } */
===================================================================
@@ -1,17 +0,0 @@
-/* { dg-do compile { target { { sh-*-* sh[1234ble]*-*-* } && nonpic } } } */
-/* { dg-options "-O" } */
-extern void foo ();
-#pragma trapa
-void
-isr()
-{
- foo ();
-}
-
-/* { dg-final { scan-assembler-times "rte" 1} } */
-/* No interrupt-specific saves should be needed. /
-/* { dg-final { scan-assembler-not "r\[0-7\]\[ \t,\]\[^\n\]*r15" } } */
-/* { dg-final { scan-assembler-not "@r15\[^\n\]*r\[0-7\]\n" } } */
-/* { dg-final { scan-assembler-not "r\[8-9\]" } } */
-/* { dg-final { scan-assembler-not "r1\[,0-3\]" } } */
-/* { dg-final { scan-assembler-not "macl" } } */
===================================================================
@@ -1,17 +0,0 @@
-/* { dg-do compile { target h8300-*-* sh-*-* sh[1234ble]*-*-* } } */
-/* { dg-options "-O3" } */
-/* Test case will check whether rte is generated for two ISRs*/
-extern void foo();
-#pragma interrupt
-void isr1(void)
-{
- foo();
-}
-
-#pragma interrupt
-void isr2(void)
-{
- foo();
-}
-
-/* { dg-final { scan-assembler-times "rte" 2} } */
Hi, I've noticed that testsuite/gcc.dg has some ISR related test cases that probably should have went to testsuite/gcc.target. The tests in question were mainly for SH, with two of them being used also for H8/300. Attached patch is supposed to fix that, also fixing some formatting issues and target checking for some of the SH tests. Unfortunately there's no H8/300 target test collection, so I took the liberty of adding one. Tested briefly with make check-gcc RUNTESTFLAGS="sh.exp --target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" OK? Cheers, Oleg testsuite/ChangeLog: * gcc.target/h8300/h8300.exp: New. * gcc.dg/pragma-isr.c: Move to ... * gcc.target/sh/torture/pragma-isr.c: ... here ... * gcc.target/h8300/pragma-isr.c: ... and here. * gcc.dg/pragma-isr2.c: Move to ... * gcc.target/sh/torture/pragma-isr2.c: ... here ... * gcc.target/h8300/pragma-isr2.c: ... and here. * gcc.dg/pragma-isr-trapa.c: Move to ... * gcc.target/sh/pragma-isr-trapa.c: ... here. * gcc.dg/pragma-isr-trapa2.c: Move to ... * gcc.target/sh/pragma-isr-trapa2.c: ... here. * gcc.dg/pragma-isr-trap_exit.c: Move to ... * gcc.target/sh/pragma-isr-trap-exit.c: ... here. * gcc.dg/pragma-isr-nosave_low_regs.c: Move to ... * gcc.target/sh/pragma-isr-nosave_low_regs.c: ... here. * gcc.dg/attr-isr-nosave_low_regs.c: Move to ... * gcc.target/sh/attr-isr-nosave_low_regs.c: ... here. * gcc.dg/attr-isr-trap_exit.c: Move to ... * gcc.target/sh/attr-isr-trap_exit.c: ... here. * gcc.dg/attr-isr-trapa.c: Move to ... * gcc.target/sh/attr-isr-trapa.c: ... here.