From patchwork Wed Jun 13 12:37:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bill Schmidt X-Patchwork-Id: 164651 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 6DC3C1008F8 for ; Wed, 13 Jun 2012 22:37:49 +1000 (EST) Comment: DKIM? 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Violators will be prosecuted; Wed, 13 Jun 2012 08:37:15 -0400 Received: from d01relay06.pok.ibm.com (d01relay06.pok.ibm.com [9.56.227.116]) by d01dlp02.pok.ibm.com (Postfix) with ESMTP id 02E3F6E8053 for ; Wed, 13 Jun 2012 08:37:15 -0400 (EDT) Received: from d01av02.pok.ibm.com (d01av02.pok.ibm.com [9.56.224.216]) by d01relay06.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id q5DCbE3l25559136 for ; Wed, 13 Jun 2012 08:37:14 -0400 Received: from d01av02.pok.ibm.com (loopback [127.0.0.1]) by d01av02.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id q5DCbEt3012094 for ; Wed, 13 Jun 2012 09:37:14 -0300 Received: from [9.76.42.35] (sig-9-76-42-35.mts.ibm.com [9.76.42.35]) by d01av02.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id q5DCbDZk012031 for ; Wed, 13 Jun 2012 09:37:14 -0300 Message-ID: <1339591033.18291.21.camel@gnopaine> Subject: [PATCH, committed] Fix PR53647 From: "William J. Schmidt" To: gcc-patches@gcc.gnu.org Date: Wed, 13 Jun 2012 07:37:13 -0500 Mime-Version: 1.0 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 12061312-1976-0000-0000-00000E18EC1D Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org It turns out we have some old machine descriptions that have no L1 cache, so we must account for a zero line size. Regstrapped on powerpc64-linux-unknown-gnu with no new failures, committed as obvious. Thanks, Bill 2012-06-13 Bill Schmidt PR tree-optimization/53647 * tree-ssa-phiopt.c (gate_hoist_loads): Skip transformation for targets with no defined cache line size. Index: gcc/tree-ssa-phiopt.c =================================================================== --- gcc/tree-ssa-phiopt.c (revision 188482) +++ gcc/tree-ssa-phiopt.c (working copy) @@ -1976,12 +1976,14 @@ hoist_adjacent_loads (basic_block bb0, basic_block /* Determine whether we should attempt to hoist adjacent loads out of diamond patterns in pass_phiopt. Always hoist loads if -fhoist-adjacent-loads is specified and the target machine has - a conditional move instruction. */ + both a conditional move instruction and a defined cache line size. */ static bool gate_hoist_loads (void) { - return (flag_hoist_adjacent_loads == 1 && HAVE_conditional_move); + return (flag_hoist_adjacent_loads == 1 + && PARAM_VALUE (PARAM_L1_CACHE_LINE_SIZE) + && HAVE_conditional_move); } /* Always do these optimizations if we have SSA