| Message ID | 1202edce-cd9c-45a2-a47c-7145bfdebae4@AZ-NEU-EX04.Arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] arm: Add support for new frame unwinding instruction "0xb5". | expand |
On 20/01/2023 17:27, Srinath Parvathaneni via Gcc-patches wrote: > Hi, > > This patch adds support for Arm frame unwinding instruction "0xb5" [1]. When > an exception is taken and "0xb5" instruction is encounter during runtime > stack-unwinding, we use effective vsp as modifier in pointer authentication. > On completion of stack unwinding if "0xb5" instruction is not encountered > then CFA will be used as modifier in pointer authentication. > > [1] https://github.com/ARM-software/abi-aa/releases/download/2022Q3/ehabi32.pdf > > Regression tested on arm-none-eabi target and found no regressions. > > Ok for master? > > Regards, > Srinath. > > gcc/ChangeLog: > > 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com> > > * libgcc/config/arm/pr-support.c (__gnu_unwind_execute): Decode opcode "0xb5". > > > ############### Attachment also inlined for ease of reply ############### > > > diff --git a/libgcc/config/arm/pr-support.c b/libgcc/config/arm/pr-support.c > index e48854587c667a959aa66ccc4982231f63333ecc..1fbc41e17c227c21af1937344ded2a7fd80e61df 100644 > --- a/libgcc/config/arm/pr-support.c > +++ b/libgcc/config/arm/pr-support.c > @@ -107,7 +107,9 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) > _uw op; > int set_pc; > int set_pac = 0; > + int set_pac_sp = 0; > _uw reg; > + _uw sp; > > set_pc = 0; > for (;;) > @@ -124,10 +126,11 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) > #if defined(TARGET_HAVE_PACBTI) > if (set_pac) > { > - _uw sp; > _uw lr; > _uw pac; > - _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); > + if (!set_pac_sp) > + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, > + &sp); > _Unwind_VRS_Get (context, _UVRSC_CORE, R_LR, _UVRSD_UINT32, &lr); > _Unwind_VRS_Get (context, _UVRSC_PAC, R_IP, > _UVRSD_UINT32, &pac); > @@ -259,6 +262,14 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) > continue; > } > > + /* Use current VSP as modifier in PAC validation. */ > + if (op == 0xb5) > + { > + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); > + set_pac_sp = 1; > + continue; > + } > + > if ((op & 0xfc) == 0xb4) /* Obsolete FPA. */ > return _URC_FAILURE; > > > > OK. R.
diff --git a/libgcc/config/arm/pr-support.c b/libgcc/config/arm/pr-support.c index e48854587c667a959aa66ccc4982231f63333ecc..1fbc41e17c227c21af1937344ded2a7fd80e61df 100644 --- a/libgcc/config/arm/pr-support.c +++ b/libgcc/config/arm/pr-support.c @@ -107,7 +107,9 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) _uw op; int set_pc; int set_pac = 0; + int set_pac_sp = 0; _uw reg; + _uw sp; set_pc = 0; for (;;) @@ -124,10 +126,11 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) #if defined(TARGET_HAVE_PACBTI) if (set_pac) { - _uw sp; _uw lr; _uw pac; - _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); + if (!set_pac_sp) + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, + &sp); _Unwind_VRS_Get (context, _UVRSC_CORE, R_LR, _UVRSD_UINT32, &lr); _Unwind_VRS_Get (context, _UVRSC_PAC, R_IP, _UVRSD_UINT32, &pac); @@ -259,6 +262,14 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) continue; } + /* Use current VSP as modifier in PAC validation. */ + if (op == 0xb5) + { + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); + set_pac_sp = 1; + continue; + } + if ((op & 0xfc) == 0xb4) /* Obsolete FPA. */ return _URC_FAILURE;
Hi, This patch adds support for Arm frame unwinding instruction "0xb5" [1]. When an exception is taken and "0xb5" instruction is encounter during runtime stack-unwinding, we use effective vsp as modifier in pointer authentication. On completion of stack unwinding if "0xb5" instruction is not encountered then CFA will be used as modifier in pointer authentication. [1] https://github.com/ARM-software/abi-aa/releases/download/2022Q3/ehabi32.pdf Regression tested on arm-none-eabi target and found no regressions. Ok for master? Regards, Srinath. gcc/ChangeLog: 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * libgcc/config/arm/pr-support.c (__gnu_unwind_execute): Decode opcode "0xb5". ############### Attachment also inlined for ease of reply ############### diff --git a/libgcc/config/arm/pr-support.c b/libgcc/config/arm/pr-support.c index e48854587c667a959aa66ccc4982231f63333ecc..1fbc41e17c227c21af1937344ded2a7fd80e61df 100644 --- a/libgcc/config/arm/pr-support.c +++ b/libgcc/config/arm/pr-support.c @@ -107,7 +107,9 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) _uw op; int set_pc; int set_pac = 0; + int set_pac_sp = 0; _uw reg; + _uw sp; set_pc = 0; for (;;) @@ -124,10 +126,11 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) #if defined(TARGET_HAVE_PACBTI) if (set_pac) { - _uw sp; _uw lr; _uw pac; - _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); + if (!set_pac_sp) + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, + &sp); _Unwind_VRS_Get (context, _UVRSC_CORE, R_LR, _UVRSD_UINT32, &lr); _Unwind_VRS_Get (context, _UVRSC_PAC, R_IP, _UVRSD_UINT32, &pac); @@ -259,6 +262,14 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) continue; } + /* Use current VSP as modifier in PAC validation. */ + if (op == 0xb5) + { + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); + set_pac_sp = 1; + continue; + } + if ((op & 0xfc) == 0xb4) /* Obsolete FPA. */ return _URC_FAILURE;