From patchwork Tue Dec 17 13:08:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 1211398 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-516111-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="oUC4B0vu"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47cdkH6mw0z9sST for ; Wed, 18 Dec 2019 00:08:37 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:message-id:date:mime-version:content-type; q=dns; s= default; b=Kk9/1lF6FVEF81Md/fLNq1Guo3BHOWmDnMhMIkmYK5PtTUQC3nLxJ QC6bBKpRoCIgsi4ZdwXIVcLSxo/9JP/D/oB0JRtYWA1zb35dbxcAzVXFr5tXEOic MGgE7apz0o11mmUEossO9QvMeOtHbW5g2v0FeyWNtntQEjMO/SYaoY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:message-id:date:mime-version:content-type; s= default; bh=oigX3RWIirXEU7iABMv7CvlrIWQ=; b=oUC4B0vuWkjph2nNs7+q 5JCZWuQvh+8nMNuoddQ0PDzACPjqVW1YXwhV3Fwg629TihRBYigaprn77CnCakfW 0TgMmfy6C0MbPDd1+mYkC244vCdJZ1Wz6fVjoDvhTHVozxkPyrtkgkjZTVO/qHtF hXgQ+CSms3VdCMeyvkv8jjY= Received: (qmail 27470 invoked by alias); 17 Dec 2019 13:08:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 27460 invoked by uid 89); 17 Dec 2019 13:08:30 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-17.4 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SUBJ_OBFU_PUNCT_FEW, SUBJ_OBFU_PUNCT_MANY autolearn=ham version=3.3.1 spammy= X-HELO: esa1.mentor.iphmx.com Received: from esa1.mentor.iphmx.com (HELO esa1.mentor.iphmx.com) (68.232.129.153) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 17 Dec 2019 13:08:29 +0000 IronPort-SDR: cMYYSiNFDpx3w9yXSjlWLX5bY9yfVo8LyarY7pObtc893g73kIsKbvsfd6mjpsOXyZYdxndWEd thva6DCJqB6ZBC8zfPzexYKwCYpkkvvQPEZRu/BnbqQU7mYooBe/DFoVbkgMDL1MN65R63LNvi jyMAOfkZ3/1rNV+Mkq+cHzcG+IqzouTZkppTBgeFmtliqD0xKWnKkcYluqnqaGWnfnRvPb19Rh kNHWRGlbt6U9XZjq7REzERGjddP7IZjSLGaiBv1YYgkWcLXhn4YFof3J56YCPUCkc9YH6Ag0ro LaQ= Received: from orw-gwy-02-in.mentorg.com ([192.94.38.167]) by esa1.mentor.iphmx.com with ESMTP; 17 Dec 2019 05:08:27 -0800 IronPort-SDR: ZAaawev6epVhzigFMoLVC4Bgbyzpe+H2ZbTqMaHQGKxLT4LUKBIfGziMY+lJF+w23YQvW6h8uM 480RQhMSfrnpBeAOCaofw6tvUhO8WGBDpeyCzhUO8vBCVBG2VeseWlknI1gNxaSKvxrokQqVzp ugsRTgZoHMaVwp+Wkd3CXS1e7zUIQDAtaWiCf6cL/H6kV2/obgdt8kWxkknzgW+qr9yQec/vSm m86epsORBD8Wj5vKHLjh9Ky5/ggx1KLGIDkNB6Dl0+pCJxxNiNcjHjin21mG01P966z3o0i7tm R1U= From: Andrew Stubbs Subject: [committed, amdgcn] Implement extract_last and fold_extract_last To: "gcc-patches@gcc.gnu.org" Message-ID: <112f1eef-73b5-dc07-7523-1a1d570e401b@codesourcery.com> Date: Tue, 17 Dec 2019 13:08:20 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 This patch implements the vector extract last instruction patterns in the AMD GCN backend. This is both an optimization and a "fix" for pr92772, in which the conditional reduction algorithm is broken for architectures with masked vectors. This fixes too many testcase failures in vect.exp to name them all individually, but includes vect-cond_reduc-* and pr65947-10.c. Andrew Stubbs Mentor Graphics / CodeSourcery Add extract_last for amdgcn 2019-12-17 Andrew Stubbs gcc/ * config/gcn/gcn-valu.md (extract_last_): New expander. (fold_extract_last_): New expander. gcc/testsuite/ * lib/target-supports.exp (check_effective_target_vect_fold_extract_last): Add amdgcn. diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 42604466161..3b3be8a9e36 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -591,6 +591,48 @@ (set_attr "exec" "none") (set_attr "laneselect" "yes")]) +(define_expand "extract_last_" + [(match_operand: 0 "register_operand") + (match_operand:DI 1 "gcn_alu_operand") + (match_operand:VEC_ALLREG_MODE 2 "register_operand")] + "can_create_pseudo_p ()" + { + rtx dst = operands[0]; + rtx mask = operands[1]; + rtx vect = operands[2]; + rtx tmpreg = gen_reg_rtx (SImode); + + emit_insn (gen_clzdi2 (tmpreg, mask)); + emit_insn (gen_subsi3 (tmpreg, GEN_INT (63), tmpreg)); + emit_insn (gen_vec_extract (dst, vect, tmpreg)); + DONE; + }) + +(define_expand "fold_extract_last_" + [(match_operand: 0 "register_operand") + (match_operand: 1 "gcn_alu_operand") + (match_operand:DI 2 "gcn_alu_operand") + (match_operand:VEC_ALLREG_MODE 3 "register_operand")] + "can_create_pseudo_p ()" + { + rtx dst = operands[0]; + rtx default_value = operands[1]; + rtx mask = operands[2]; + rtx vect = operands[3]; + rtx else_label = gen_label_rtx (); + rtx end_label = gen_label_rtx (); + + rtx cond = gen_rtx_EQ (VOIDmode, mask, const0_rtx); + emit_jump_insn (gen_cbranchdi4 (cond, mask, const0_rtx, else_label)); + emit_insn (gen_extract_last_ (dst, mask, vect)); + emit_jump_insn (gen_jump (end_label)); + emit_barrier (); + emit_label (else_label); + emit_move_insn (dst, default_value); + emit_label (end_label); + DONE; + }) + (define_expand "vec_init" [(match_operand:VEC_ALLREG_MODE 0 "register_operand") (match_operand 1)] diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 80e9d6720bd..98f1141a8a4 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6974,7 +6974,8 @@ proc check_effective_target_vect_logical_reduc { } { # Return 1 if the target supports the fold_extract_last optab. proc check_effective_target_vect_fold_extract_last { } { - return [check_effective_target_aarch64_sve] + return [expr { [check_effective_target_aarch64_sve] + || [istarget amdgcn*-*-*] }] } # Return 1 if the target supports section-anchors