diff mbox series

testsuite, rs6000: Replace powerpc_vsx_ok with powerpc_altivec etc.

Message ID 0f1fed32-54c9-e5cd-6404-33d6056b25c7@linux.ibm.com
State New
Headers show
Series testsuite, rs6000: Replace powerpc_vsx_ok with powerpc_altivec etc. | expand

Commit Message

Kewen.Lin July 31, 2024, 9:08 a.m. UTC 
Hi,

This is a follow up patch for the previous patch adjusting
powerpc_vsx_ok with powerpc_vsx, focusing on those test cases
which don't really require VSX feature but used powerpc_vsx_ok
before, they actually require some other effective target check,
like some of them just require ALTIVEC feature, some of them
just require hard float support, and some of them just require
ISA 2.06 etc..

By the way, ppc-fpconv-4.c is the only one missing powerpc_fprs
among ppc-fpconv-*.c after this replacement, so I also fix it
here.

Bootstrapped and regtested on powerpc64-linux-gnu P8/P9 and
powerpc64le-linux-gnu P9 and P10.

I'm going to push this next week if no objections.

BR,
Kewen
----

	PR testsuite/114842

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/bswap64-2.c: Replace powerpc_vsx_ok check with
	has_arch_pwr7.
	* gcc.target/powerpc/ppc-fpconv-2.c: Replace powerpc_vsx_ok check with
	powerpc_fprs.
	* gcc.target/powerpc/ppc-fpconv-6.c: Likewise.
	* gcc.target/powerpc/ppc-pow.c: Likewise.
	* gcc.target/powerpc/ppc-target-1.c: Likewise.
	* gcc.target/powerpc/ppc-target-2.c: Likewise.
	* gcc.target/powerpc/ppc-target-3.c: Likewise.
	* gcc.target/powerpc/ppc-target-4.c: Likewise.
	* gcc.target/powerpc/ppc-fpconv-4.c: Check for powerpc_fprs.
	* gcc.target/powerpc/fold-vec-select-char.c: Replace powerpc_vsx_ok
	with powerpc_altivec check and move it after dg-options line.
	* gcc.target/powerpc/fold-vec-select-float.c: Likewise.
	* gcc.target/powerpc/fold-vec-select-int.c: Likewise.
	* gcc.target/powerpc/fold-vec-select-short.c: Likewise.
	* gcc.target/powerpc/p9-novsx.c: Likewise.
	* gcc.target/powerpc/p9-options-1.c: Likewise.
---
 gcc/testsuite/gcc.target/powerpc/bswap64-2.c             | 2 +-
 gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c  | 2 +-
 gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c | 6 +++---
 gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c   | 2 +-
 gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c | 2 +-
 gcc/testsuite/gcc.target/powerpc/p9-novsx.c              | 2 +-
 gcc/testsuite/gcc.target/powerpc/p9-options-1.c          | 2 +-
 gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c          | 2 +-
 gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c          | 1 +
 gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c          | 2 +-
 gcc/testsuite/gcc.target/powerpc/ppc-pow.c               | 2 +-
 gcc/testsuite/gcc.target/powerpc/ppc-target-1.c          | 3 ++-
 gcc/testsuite/gcc.target/powerpc/ppc-target-2.c          | 3 ++-
 gcc/testsuite/gcc.target/powerpc/ppc-target-3.c          | 2 +-
 gcc/testsuite/gcc.target/powerpc/ppc-target-4.c          | 2 +-
 15 files changed, 19 insertions(+), 16 deletions(-)

--
2.43.5
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/bswap64-2.c b/gcc/testsuite/gcc.target/powerpc/bswap64-2.c
index 6c3d8ca0528..70d872b5e30 100644
--- a/gcc/testsuite/gcc.target/powerpc/bswap64-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bswap64-2.c
@@ -1,7 +1,7 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-options "-O2 -mpopcntd" } */
 /* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target has_arch_pwr7 } */
 /* { dg-final { scan-assembler "ldbrx" } } */
 /* { dg-final { scan-assembler "stdbrx" } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c
index e055c017536..17e28914aae 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c
@@ -2,8 +2,8 @@ 
    inputs produce the right code.  */

 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_altivec } */

 #include <altivec.h>

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c
index 1656fbff2ca..848bd750ff8 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c
@@ -1,9 +1,9 @@ 
-/* Verify that overloaded built-ins for vec_sel with float
-   inputs for VSX produce the right code.  */
+/* Verify that overloaded built-ins for vec_sel with float
+   inputs produce the right code.  */

 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_altivec } */

 #include <altivec.h>

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c
index 510fc564370..f51d741d401 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c
@@ -2,8 +2,8 @@ 
    inputs produce the right code.  */

 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_altivec } */

 #include <altivec.h>

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c
index 0d11fce81b2..666e07abf02 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c
@@ -2,8 +2,8 @@ 
    inputs produce the right code.  */

 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_altivec } */

 #include <altivec.h>

diff --git a/gcc/testsuite/gcc.target/powerpc/p9-novsx.c b/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
index 719267665d2..15807f9da68 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-mdejagnu-cpu=power9 -mvsx -mno-vsx -O1" } */
+/* { dg-require-effective-target powerpc_altivec } */
 /* { dg-final { scan-assembler-times "lvx %?v?2,%?r?3" 1 } } */
 /* { dg-final { scan-assembler-times "stvx %?v?2,%?r?3" 1 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/p9-options-1.c b/gcc/testsuite/gcc.target/powerpc/p9-options-1.c
index 9da4d3630c0..034a7f8012a 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-options-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-options-1.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-mdejagnu-cpu=power9 -mno-vsx" } */
+/* { dg-require-effective-target powerpc_altivec } */

 #include <altivec.h>

diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c
index df5c5dfeece..6f8e3c85c6a 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -mdejagnu-cpu=power6 -ffast-math" } */
 /* { dg-final { scan-assembler-times "lfiwax" 2 } } */
 /* { dg-final { scan-assembler-not "lfiwzx" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c
index b9db8769a0c..9db22cb7019 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target ilp32 } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-skip-if "" { powerpc*-*-* } { "-mpowerpc64" } } */
 /* { dg-options "-O2 -mdejagnu-cpu=750 -ffast-math" } */
 /* { dg-final { scan-assembler-not "lfiwax" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c
index 794a6f9c6bf..24a6dd99e71 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O3 -mdejagnu-cpu=power6 -ffast-math" } */
 /* { dg-final { scan-assembler-times "fctiwz " 2 } } */
 /* { dg-final { scan-assembler-not "fctiwuz " } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-pow.c b/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
index 66358299dc1..dfcd57ac024 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
@@ -3,7 +3,7 @@ 
 /* Check for VSX here, even though we don't use VSX to eliminate SPE, PAIRED
    and other ppc floating point varients.  However, we need to also eliminate
    Darwin, since it doesn't like -mcpu=power6.  */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power6 -mno-vsx -mno-altivec" } */
 /* { dg-final { scan-assembler-times "fsqrt" 3 } } */
 /* { dg-final { scan-assembler-times "fmul" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c
index 6f06e920d2a..a9eb95ab441 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_altivec } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mabi=altivec" } */
 /* { dg-final { scan-assembler-times "fabs" 3 } } */
 /* { dg-final { scan-assembler-times "fnabs" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c
index 034aaad7fc9..a13308f4e22 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_altivec } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mabi=altivec" } */
 /* { dg-final { scan-assembler-times "fabs" 3 } } */
 /* { dg-final { scan-assembler-times "fnabs" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c
index 4f579df8a39..2a297fd4775 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mabi=no-altivec" } */
 /* { dg-final { scan-assembler-times "fabs" 3 } } */
 /* { dg-final { scan-assembler-times "fnabs" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
index db9ba500e0e..feef76db461 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mno-altivec -mabi=altivec -fno-unroll-loops" } */
 /* { dg-final { scan-assembler-times "vaddfp" 1 } } */
 /* { dg-final { scan-assembler-times "xvaddsp" 1 } } */