Message ID | 0EFAB2BDD0F67E4FB6CCC8B9F87D756969CDC45C@IRSMSX101.ger.corp.intel.com |
---|---|
State | New |
Headers | show |
On Fri, Dec 12, 2014 at 1:21 PM, Zamyatin, Igor <igor.zamyatin@intel.com> wrote: > When adding checks for PIC register in address cost calculation (http://gcc.gnu.org/ml/gcc-cvs/2014-10/msg00411.html) it was meant to affect only RTL passes. > Since !pic_offset_table_rtx is not enough for it (I see that pic_offset_table_rtx enabled on GIMPLE level) following change explicitly adds this restriction. > > Bootstrapped and regtested with RUNTESTFLAGS="--target_board='unix{-m32,-fpic}'" > Is it ok for trunk? > > 2014-12-12 Igor Zamyatin <igor.zamyatin@intel.com> > > * config/i386/i386.c (ix86_address_cost): Add explicit restriction > to RTL level for the check for PIC register. OK. Thanks, Uros.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index fffddfc..799411c 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -12802,12 +12802,14 @@ ix86_address_cost (rtx x, machine_mode, addr_space_t, bool) Therefore only "pic_offset_table_rtx" could be hoisted out, which is not profitable for x86. */ if (parts.base - && (!pic_offset_table_rtx - || REGNO (pic_offset_table_rtx) != REGNO(parts.base)) + && (current_pass->type == GIMPLE_PASS + || (!pic_offset_table_rtx + || REGNO (pic_offset_table_rtx) != REGNO(parts.base))) && (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER) && parts.index - && (!pic_offset_table_rtx - || REGNO (pic_offset_table_rtx) != REGNO(parts.index)) + && (current_pass->type == GIMPLE_PASS + || (!pic_offset_table_rtx + || REGNO (pic_offset_table_rtx) != REGNO(parts.index))) && (!REG_P (parts.index) || REGNO (parts.index) >= FIRST_PSEUDO_REGISTER) && parts.base != parts.index) cost++;