From patchwork Fri Nov 14 16:59:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zamyatin, Igor" X-Patchwork-Id: 410940 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 112AE140082 for ; Sat, 15 Nov 2014 04:00:37 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:references:in-reply-to :content-type:content-transfer-encoding:mime-version; q=dns; s= default; b=QsbWsQxpxtqcQWVZehCwoGNkLrYq+3qTaT9lsFTqE1XCbiW3NXsFg EbICL57IKUgIyGbFWtEyggv1Dx+4VOmlftu6vrDh9CSfhZuzry/EvDXnxhETd/18 nuUiEFp+fbYV2GCob2tMOMm4wOa4BlMJ5hxxis7m6ROij2+cEl+TsI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:references:in-reply-to :content-type:content-transfer-encoding:mime-version; s=default; bh=W7Oi8IMFzz/Ate79JCNii4Ki/lc=; b=wDgXCXSy4E/su5emVXcXzPaJkPAU /ep7/Mcf6Ow8TG4bOSuHPLIWY87NX4QmIrxkmre7N9zNz4SR5ZEJrcc8PCKGCyq4 5BbUNl6UaciO4pw8//cqkvsdGVyZHsuX/D+pIdYBveSdAzgKwc8Z4UrUrfq5eI9q WsaKt+F52Me8gig= Received: (qmail 6141 invoked by alias); 14 Nov 2014 17:00:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 6129 invoked by uid 89); 14 Nov 2014 17:00:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL, BAYES_00, MIME_BASE64_BLANKS, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mga11.intel.com Received: from mga11.intel.com (HELO mga11.intel.com) (192.55.52.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 14 Nov 2014 17:00:28 +0000 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 14 Nov 2014 09:00:05 -0800 X-ExtLoop1: 1 Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155]) by FMSMGA003.fm.intel.com with ESMTP; 14 Nov 2014 08:50:59 -0800 Received: from irsmsx153.ger.corp.intel.com (163.33.192.75) by IRSMSX102.ger.corp.intel.com (163.33.3.155) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 14 Nov 2014 17:00:03 +0000 Received: from irsmsx101.ger.corp.intel.com ([169.254.1.105]) by IRSMSX153.ger.corp.intel.com ([169.254.9.235]) with mapi id 14.03.0195.001; Fri, 14 Nov 2014 16:59:52 +0000 From: "Zamyatin, Igor" To: "H.J. Lu" CC: Jeff Law , "GCC Patches (gcc-patches@gcc.gnu.org)" Subject: RE: [PATCH, i686] Fix for asan test failures with -m32 happened after EBX enabling in PIC mode Date: Fri, 14 Nov 2014 16:59:47 +0000 Message-ID: <0EFAB2BDD0F67E4FB6CCC8B9F87D756969C5240E@IRSMSX101.ger.corp.intel.com> References: <0EFAB2BDD0F67E4FB6CCC8B9F87D756969C18BCF@IRSMSX101.ger.corp.intel.com> <5453D872.3070402@redhat.com> <0EFAB2BDD0F67E4FB6CCC8B9F87D756969C25D63@IRSMSX101.ger.corp.intel.com> In-Reply-To: MIME-Version: 1.0 X-IsSubscribed: yes > >> > > >> > ChangeLog: > >> > > >> > 2014-10-30 Igor Zamyatin > >> > > >> > * function.c (assign_parms): Move init of pic_offset_table_rtx > >> > from here to... > >> > * cfgexpand.c (expand_used_vars): ...here. > >> The patch is probably fine. However, it would be good to have the > >> analysis why you want to move initialization of the PIC register earlier. > > > > Asan (and anybody else can) emits global variable(s) in expand_used_vars > during function expanding while pic reg is currently initialized later, during > expand_function_start in assign_parms thus to be late in asan case in PIC > mode. > > > > So to avoid such cases we put pic reg initialization in the beginning of > expand_used_vars. This seems to be early enough. > > > > Please mention PR in ChangeLog and add a few testcases so that the fix will > be tested on Linux. > Bootstrapped and regtested on x86_64 and i686 incl pic mode. Is it ok? Thanks, Igor gcc/Changelog: 2014-11-14 Igor Zamyatin PR sanitizer/63845 * function.c (assign_parms): Move init of pic_offset_table_rtx from here to... * cfgexpand.c (expand_used_vars): ...here. gcc/testsuite/Changelog: 2014-11-14 Igor Zamyatin PR sanitizer/63845 * gcc.target/i386/pr63845.c: New test. diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c index 15d7638..bcd3b35 100644 --- a/gcc/cfgexpand.c +++ b/gcc/cfgexpand.c @@ -1722,6 +1722,9 @@ expand_used_vars (void) init_vars_expansion (); + if (targetm.use_pseudo_pic_reg ()) + pic_offset_table_rtx = gen_reg_rtx (Pmode); + hash_map ssa_name_decls; for (i = 0; i < SA.map->num_partitions; i++) { diff --git a/gcc/function.c b/gcc/function.c index ef98091..97e0b79 100644 --- a/gcc/function.c +++ b/gcc/function.c @@ -3679,11 +3679,6 @@ assign_parms (tree fndecl) fnargs.release (); - /* Initialize pic_offset_table_rtx with a pseudo register - if required. */ - if (targetm.use_pseudo_pic_reg ()) - pic_offset_table_rtx = gen_reg_rtx (Pmode); - /* Output all parameter conversion instructions (possibly including calls) now that all parameters have been copied out of hard registers. */ emit_insn (all.first_conversion_insn); diff --git a/gcc/testsuite/gcc.target/i386/pr63845.c b/gcc/testsuite/gcc.target/i386/pr63845.c new file mode 100644 index 0000000..4b675e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr63845.c @@ -0,0 +1,20 @@ +/* PR sanitizer/63845 */ +/* { dg-do compile } */ +/* { dg-require-effective-target ia32 } */ +/* { dg-require-effective-target fpic } */ +/* { dg-skip-if "No Windows PIC" { *-*-mingw* *-*-cygwin } { "*" } { "" } } */ +/* { dg-options "-fPIC" } */ + +int __attribute__ ((noinline, noclone)) +foo (void *p) +{ + return *(int*)p; +} + +int main () +{ + char a = 0; + foo (&a); + return 0; +} +