From patchwork Sat Aug 12 02:57:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 1820481 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=Ze34KOLS; dkim-atps=neutral Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4RN52B0kr3z1yYC for ; Sat, 12 Aug 2023 12:58:10 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 202873857020 for ; Sat, 12 Aug 2023 02:58:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 202873857020 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1691809088; bh=wyMbXITu1c406/0WIzbrcS/fvpL+LeC3AR9U5WY9wkk=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=Ze34KOLSRxRQgvT/tQB17Bsanr1kopgkM1IVT11Vo4SoOkWjNLSTpVd/sCZoDsdyP bK5nyeYgz/k7CP8T+OZcw7HSfQhP1IExLljGCFLvqNa70jtgBKD66GnrfgUMraBItu JLs8ub8RSQJ+JLE0yNQ4MekKCCxy1MuFLd9QhEN8= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 05BC03857B9B for ; Sat, 12 Aug 2023 02:57:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 05BC03857B9B Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 872B2300089; Sat, 12 Aug 2023 02:57:43 +0000 (UTC) To: Tsukasa OI , Kito Cheng , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: [PATCH 1/3] RISC-V: Add stub support for existing extensions (privileged) Date: Sat, 12 Aug 2023 02:57:18 +0000 Message-ID: <07367d2034ca205f0476a4988f488586c0c62bb7.1691809036.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_MANYTO, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gcc-patches From: Tsukasa OI Reply-To: Tsukasa OI Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Tsukasa OI After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown extensions") changed how do we handle unknown extensions, we have no guarantee that we can share the same architectural string with Binutils (specifically, the assembler). To avoid compilation errors on shared Assembler-C/C++ projects, GCC should support almost all extensions that Binutils support, even if the GCC does not touch a thing. As a start, this commit adds stub supported *privileged* extensions to riscv_ext_version_table and its implications to riscv_implied_info (all information is copied from Binutils' bfd/elfxx-riscv.c). gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_implied_info): Add implications from privileged extensions. (riscv_ext_version_table): Add stub support for all privileged extensions supported by Binutils. gcc/testsuite/ChangeLog: * gcc.target/riscv/predef-29.c: New test for a stub privileged extension 'Smstateen' with some implications. --- gcc/common/config/riscv/riscv-common.cc | 18 +++++++++++ gcc/testsuite/gcc.target/riscv/predef-29.c | 35 ++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/predef-29.c diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 21f83f26371f..91b0316acfea 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -130,6 +130,14 @@ static const riscv_implied_info_t riscv_implied_info[] = {"zhinx", "zhinxmin"}, {"zhinxmin", "zfinx"}, + {"smaia", "ssaia"}, + {"smstateen", "ssstateen"}, + {"smepmp", "zicsr"}, + {"ssaia", "zicsr"}, + {"sscofpmf", "zicsr"}, + {"ssstateen", "zicsr"}, + {"sstc", "zicsr"}, + {NULL, NULL} }; @@ -264,8 +272,18 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"zmmul", ISA_SPEC_CLASS_NONE, 1, 0}, + {"smaia", ISA_SPEC_CLASS_NONE, 1, 0}, + {"smepmp", ISA_SPEC_CLASS_NONE, 1, 0}, + {"smstateen", ISA_SPEC_CLASS_NONE, 1, 0}, + + {"ssaia", ISA_SPEC_CLASS_NONE, 1, 0}, + {"sscofpmf", ISA_SPEC_CLASS_NONE, 1, 0}, + {"ssstateen", ISA_SPEC_CLASS_NONE, 1, 0}, + {"sstc", ISA_SPEC_CLASS_NONE, 1, 0}, + {"svinval", ISA_SPEC_CLASS_NONE, 1, 0}, {"svnapot", ISA_SPEC_CLASS_NONE, 1, 0}, + {"svpbmt", ISA_SPEC_CLASS_NONE, 1, 0}, {"xtheadba", ISA_SPEC_CLASS_NONE, 1, 0}, {"xtheadbb", ISA_SPEC_CLASS_NONE, 1, 0}, diff --git a/gcc/testsuite/gcc.target/riscv/predef-29.c b/gcc/testsuite/gcc.target/riscv/predef-29.c new file mode 100644 index 000000000000..61c6429be558 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/predef-29.c @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_smstateen -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */ + +int main () { + +#ifndef __riscv_arch_test +#error "__riscv_arch_test" +#endif + +#if __riscv_xlen != 64 +#error "__riscv_xlen" +#endif + +#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000)) +#error "__riscv_i" +#endif + +#if defined(__riscv_e) +#error "__riscv_e" +#endif + +#if !defined(__riscv_zicsr) +#error "__riscv_zicsr" +#endif + +#if !defined(__riscv_smstateen) +#error "__riscv_smstateen" +#endif + +#if !defined(__riscv_ssstateen) +#error "__riscv_ssstateen" +#endif + + return 0; +}