| Message ID | 00a701d99995$0c8d3d60$25a7b820$@nextmovesoftware.com |
|---|---|
| State | New |
| Headers | show |
| Series | [nvptx] Update nvptx's bitrev<mode>2 pattern to use BITREVERSE rtx. | expand |
Hi! On 2023-06-08T00:09:00+0100, "Roger Sayle" <roger@nextmovesoftware.com> wrote: > This minor tweak to the nvptx backend switches the representation of > of the brev instruction from an UNSPEC to instead use the new BITREVERSE > rtx. ACK. > This allows various RTL optimizations including evaluation (constant > folding) of integer constant arguments at compile-time. ..., which we're then observing via commit 61c45c055a5ccfc59463c21ab057dece822d973c "nvptx: Extend 'brev' test cases" that I just pushed; <https://inbox.sourceware.org/87a5rfum3v.fsf@euler.schwinge.homeip.net> "nvptx: Extend 'brev' test cases". > This patch has been tested on nvptx-none with make and make -k check > with no new failures. Ok for mainline? I've thus updated the test cases for these changes here, and pushed to master branch commit 75c20a99b3a242121eef8a532f5224c00c471b56 "Update nvptx's bitrev<mode>2 pattern to use BITREVERSE rtx.", see attached. Grüße Thomas ----------------- Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht München, HRB 106955
diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md index 1bb9304..7a7c994 100644 --- a/gcc/config/nvptx/nvptx.md +++ b/gcc/config/nvptx/nvptx.md @@ -34,8 +34,6 @@ UNSPEC_FPINT_CEIL UNSPEC_FPINT_NEARBYINT - UNSPEC_BITREV - UNSPEC_ALLOCA UNSPEC_SET_SOFTSTACK @@ -636,8 +634,7 @@ (define_insn "bitrev<mode>2" [(set (match_operand:SDIM 0 "nvptx_register_operand" "=R") - (unspec:SDIM [(match_operand:SDIM 1 "nvptx_register_operand" "R")] - UNSPEC_BITREV))] + (bitreverse:SDIM (match_operand:SDIM 1 "nvptx_register_operand" "R")))] "" "%.\\tbrev.b%T0\\t%0, %1;")
This minor tweak to the nvptx backend switches the representation of of the brev instruction from an UNSPEC to instead use the new BITREVERSE rtx. This allows various RTL optimizations including evaluation (constant folding) of integer constant arguments at compile-time. This patch has been tested on nvptx-none with make and make -k check with no new failures. Ok for mainline? 2023-06-07 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete. (bitrev<mode>2): Represent using bitreverse. Thanks in advance, Roger --